이태억 교수
Tae‐Eog Lee
KAIST 산업및시스템공학과 · 공학
연구실 소개
이태억 교수의 연구실은 반도체 제조 공정의 핵심 요소인 클러스터 툴, 웻 스테이션, 이벤트 그래프 기반 스케줄링 등에서 시간 창 제약, 로봇 충돌 방지, 웨이퍼 지연 최소화 등의 복잡한 제어 문제를 수학적 모델링과 Petri 네트워크 기반 분석을 통해 해결하는 데 주력하고 있습니다. 특히 주기적 스케줄링, 최소 사이클 타임 확보, 실시간 제어 가능성 확보를 위한 알고리즘 개발이 핵심 연구 방향입니다. 연구는 반도체 공정의 품질 향상과 생산성 향상을 위해 실용적이고 정밀한 제어 전략을 설계하는 데 초점을 맞추고 있습니다.
연구 현황
연구 성과 추이
표시된 성과는 수집된 데이터 기준으로 산출되며, 일부 차이가 있을 수 있습니다.
주요 논문
15We introduce places with negative holding times and tokens with negative token counts into a timed event graph in order to model and analyze time window constraints. We extend the enabling and firing rules for such an extended event graph named a negative event graph (NEG). We develop necessary and sufficient conditions based on the circuits for which the NEG is live, that is, an infinite sequence of feasible firing epochs exist for each transition. We prove that the minimum cycle time is the sa
Cluster tools, which combine several single-wafer processing modules with wafer handling robots in a closed environment, have been increasingly used for most wafer fabrication processes. We review tool architectures, operational issues, and scheduling requirements. We then explain recent progress in tool science and engineering for scheduling and control of cluster tools.
Cluster tools, which combine several single-wafer processing modules with wafer handling robots in a closed environment, have been increasingly used for most wafer fabrication processes. We review tool architectures, operational issues, and scheduling requirements. We then explain recent progress in tool science and engineering for scheduling and control of cluster tools.
This paper discusses the periodic job shop scheduling problem, a problem where an identical mixture of items, called a minimal part set (MPS), is repetitively produced. The performance and behavior of schedules are discussed. Two basic performance measures, cycle time and makespan, are shown to be closely related. The minimum cycle time is identified as a circuit measure in a directed graph. We establish that there exists a class of schedules that minimizes cycle time and repeats an identical ti
A wet station performs a cleaning process in semiconductor manufacturing. It consists of several processing baths and multiple wafer-handling robots. It simultaneously processes multiple wafer types with different processing sequences. Robot collisions and deadlocks should be prevented. There are also strict no-wait time constraints where, after a wafer is cleaned in a chemical bath, it should immediately be removed from the bath and rinsed at a water bath. We examine the scheduling problem when
As the design of integrated circuits has become increasingly complicated and dense, serious wafer quality problems are observed in modern wafer fabrication facilities. Therefore, in cluster tools of leading fabs process chambers are periodically cleaned in order to eliminate residual chemicals and impurities that can damage the wafer quality. A chamber cleaning operation is mainly applied to tools in which a wafer delay has a crucial impact on the wafer quality, and hence the need of wafer delay
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