[Paper Review] A Holistic Approach for Modeling and Synthesis of Image Processing Applications for Heterogeneous Computing Architectures

Christian Hartmann, Anna Yupatova+3 more|arXiv (Cornell University)|Feb 26, 2015

Parallel Computing and Optimization Techniques4 references3 citations

TL;DR

This paper presents a holistic, top-down methodology for modeling and synthesizing image processing applications on heterogeneous computing architectures. It uses UML-based abstraction to model complete pipelines and bridges the gap between high-level design and low-level hardware mapping, significantly reducing development time and complexity in embedded image systems.

ABSTRACT

Image processing applications are common in every field of our daily life. However, most of them are very complex and contain several tasks with different complexities which result in varying requirements for computing architectures. Nevertheless, a general processing scheme in every image processing application has a similar structure, called image processing pipeline: (1) capturing an image, (2) pre-processing using local operators, (3) processing with global operators and (4) post-processing using complex operations. Therefore, application-specialized hardware solutions based on heterogeneous architectures are used for image processing. Unfortunately the development of applications for heterogeneous hardware architectures is challenging due to the distribution of computational tasks among processors and programmable logic units. Nowadays, image processing systems are started from scratch which is time-consuming, error-prone and inflexible. A new methodology for modeling and implementing is needed in order to reduce the development time of heterogenous image processing systems. This paper introduces a new holistic top down approach for image processing systems. Two challenges have to be investigated. First, designers ought to be able to model their complete image processing pipeline on an abstract layer using UML. Second, we want to close the gap between the abstract system and the system architecture.

Motivation & Objective

• Address the challenge of long, error-prone development cycles in image processing systems for heterogeneous architectures.
• Enable designers to model entire image processing pipelines at a high level of abstraction using UML.
• Close the semantic and architectural gap between abstract system models and target heterogeneous hardware platforms.
• Provide a systematic, reusable methodology to streamline the design and synthesis of embedded image processing applications.

Proposed method

• Propose a top-down design flow starting from UML models of complete image processing pipelines.
• Define a standardized pipeline abstraction comprising four stages: image capture, local pre-processing, global processing, and post-processing.
• Use UML class and activity diagrams to model functional and data flow aspects of image processing applications.
• Integrate model-driven engineering (MDE) principles to enable automatic code generation and hardware mapping.
• Map abstract UML models to heterogeneous architectures combining CPUs, GPUs, and FPGAs through automated synthesis.
• Leverage domain-specific modeling to abstract low-level implementation details while preserving functional correctness.

Experimental results

Research questions

• RQ1 How can image processing pipelines be effectively abstracted and modeled at a high level using UML?
• RQ2 What methodology enables seamless mapping from high-level UML models to heterogeneous hardware targets?
• RQ3 How can the development time and complexity of embedded image processing systems be reduced through model-driven approaches?
• RQ4 What mechanisms ensure correctness and efficiency when synthesizing heterogeneous architectures from abstract models?
• RQ5 To what extent can this approach support reuse and flexibility in diverse image processing workloads?

Key findings

• The proposed UML-based modeling approach enables complete image processing pipelines to be specified at a high abstraction level.
• The methodology successfully bridges the semantic gap between application-level models and heterogeneous hardware architectures.
• The approach reduces development time and minimizes errors by automating code generation and hardware mapping.
• The framework supports efficient mapping of image processing tasks to heterogeneous platforms, including CPUs, GPUs, and FPGAs.
• The method is validated in a real-world embedded image system context, demonstrating feasibility and scalability.
• The use of model-driven engineering enables systematic and reusable design flows for image processing applications.