[Paper Review] An All-Memristor Deep Spiking Neural Computing System: A Step Towards Realizing the Low Power,Stochastic Brain

Parami Wijesinghe, Aayush Ankit+2 more|arXiv (Cornell University)|Dec 5, 2017

Advanced Memory and Neural Computing34 references3 citations

TL;DR

This paper proposes an all-memristor deep stochastic spiking neural network (SNN) that leverages the inherent stochasticity of nanoscale memristors to emulate probabilistic spiking neurons and memristive crossbars for synaptic weights. The system achieves only 1% accuracy degradation on MNIST compared to a baseline deep ANN while consuming 6.4× less energy than a CMOS implementation, demonstrating robustness to device variations and low-power neuromorphic computing potential.

ABSTRACT

Deep 'Analog Artificial Neural Networks' (ANNs) perform complex classification problems with remarkably high accuracy. However, they rely on humongous amount of power to perform the calculations, veiling the accuracy benefits. The biological brain on the other hand is significantly more powerful than such networks and consumes orders of magnitude less power, indicating us about some conceptual mismatch. Given that the biological neurons communicate using energy efficient trains of spikes, and the behavior is non-deterministic, incorporating these effects in Deep Artificial Neural Networks may drive us few steps towards a more realistic neuron. In this work, we propose how the inherent stochasticity of nano-scale resistive devices can be harnessed to emulate the functionality of a spiking neuron that can be incorporated in deep stochastic Spiking Neural Networks (SNN). At the algorithmic level, we propose how the training can be modified to convert an ANN to an SNN while supporting the stochastic activation function offered by these devices. We devise circuit architectures to incorporate stochastic memristive neurons along with memristive crossbars which perform the functionality of the synaptic weights. We tested the proposed All Memristor deep stochastic SNN for image classification and observed only about 1% degradation in accuracy with the ANN baseline after incorporating the circuit and device related non-idealities. We witnessed that the network is robust to certain variations and consumes ~ 6.4x less energy than its CMOS counterpart.

Motivation & Objective

• To bridge the power-accuracy gap in deep neural networks by emulating the brain's low-power, stochastic spiking behavior.
• To exploit the intrinsic stochasticity of nanoscale memristors instead of suppressing it, treating it as a functional feature for probabilistic neuron behavior.
• To design a fully memristor-based architecture for both neurons and synaptic weights, enabling hardware-efficient, low-power SNNs.
• To demonstrate robustness and energy efficiency of the proposed all-memristor SNN under realistic device and circuit non-idealities.
• To enable end-to-end training and inference of deep SNNs using memristive devices without relying on deterministic approximations.

Proposed method

• The paper proposes using individual memristors as stochastic neurons, where the switching probability under varying write pulse widths emulates a probabilistic activation function.
• Memristive crossbar arrays are employed to implement synaptic weights, performing analog inner product computations between input spikes and weights.
• A modified training procedure converts a pre-trained deep ANN into a stochastic SNN, accounting for the probabilistic behavior of memristor neurons.
• The system is designed with circuit-level components including buffers, amplifiers, and inverters to interface with the memristive arrays and manage signal timing.
• The design is evaluated using a 128×128 memristive crossbar array architecture with a cell size of 100F², and latency and area estimates are derived from device and circuit parameters.
• Robustness is analyzed by injecting variations in synaptic weights (σ < 20%), neuron bias voltages (<200 mV), switching probability curves, and write pulse durations (~50% variation).

Experimental results

Research questions

• RQ1 Can the intrinsic stochasticity of nanoscale memristors be harnessed as a functional feature rather than a reliability issue in neuromorphic computing?
• RQ2 How can a deep spiking neural network be trained and implemented using only memristors for both neurons and synapses?
• RQ3 To what extent does the proposed all-memristor SNN maintain classification accuracy under device and circuit non-idealities?
• RQ4 What is the energy and area-delay efficiency of the all-memristor SNN compared to conventional CMOS-based SNNs?
• RQ5 Can the system maintain performance across varying operating speeds without accuracy degradation due to fixed probabilistic activation curves?

Key findings

• The all-memristor deep stochastic SNN achieves only 1% accuracy degradation on the MNIST dataset when compared to the original deep ANN baseline.
• The network demonstrates robustness to variations in synaptic weights (σ < 20%), neuron bias voltages (<200 mV), and write pulse durations (up to ~50% variation).
• The system consumes approximately 6.4× less energy than a comparable CMOS-based SNN implementation.
• The area × delay product of the proposed design is 8× smaller than that of the CMOS counterpart, indicating superior energy-delay efficiency.
• The energy consumption of the memristor neuron decreases with longer write pulse widths, but total energy increases due to longer pulse duration, indicating a trade-off in design optimization.
• The constant steepness of the memristor's switching probability curve across different write times enables stable performance across varying speed requirements without accuracy loss.