[Paper Review] An Efficient Multiway Mergesort for GPU Architectures

Henri Casanova, John Iacono+3 more|arXiv (Cornell University)|Feb 26, 2017

Parallel Computing and Optimization Techniques29 references3 citations

TL;DR

This paper presents GPU Multiway Mergesort (MMS), a novel multiway mergesort algorithm for GPUs that achieves asymptotically optimal global memory access counts and eliminates shared memory bank conflicts through a new parallel partitioning technique. MMS outperforms state-of-the-art libraries like Thrust and MGPU, especially on conflict-prone inputs, achieving up to 44.3% and 37.6% speedups respectively due to its bank conflict-free design and I/O efficiency.

ABSTRACT

Sorting is a primitive operation that is a building block for countless algorithms. As such, it is important to design sorting algorithms that approach peak performance on a range of hardware architectures. Graphics Processing Units (GPUs) are particularly attractive architectures as they provides massive parallelism and computing power. However, the intricacies of their compute and memory hierarchies make designing GPU-efficient algorithms challenging. In this work we present GPU Multiway Mergesort (MMS), a new GPU-efficient multiway mergesort algorithm. MMS employs a new partitioning technique that exposes the parallelism needed by modern GPU architectures. To the best of our knowledge, MMS is the first sorting algorithm for the GPU that is asymptotically optimal in terms of global memory accesses and that is completely free of shared memory bank conflicts. We realize an initial implementation of MMS, evaluate its performance on three modern GPU architectures, and compare it to competitive implementations available in state-of-the-art GPU libraries. Despite these implementations being highly optimized, MMS compares favorably, achieving performance improvements for most random inputs. Furthermore, unlike MMS, state-of-the-art algorithms are susceptible to bank conflicts. We find that for certain inputs that cause these algorithms to incur large numbers of bank conflicts, MMS can achieve up to a 37.6% speedup over its fastest competitor. Overall, even though its current implementation is not fully optimized, due to its efficient use of the memory hierarchy, MMS outperforms the fastest comparison-based sorting implementations available to date.

Motivation & Objective

• To design a GPU sorting algorithm that minimizes global memory accesses and eliminates shared memory bank conflicts.
• To address the performance degradation in existing GPU sorting libraries caused by data-dependent bank conflicts.
• To develop a theoretically grounded, I/O-efficient sorting algorithm using the Parallel External Memory (PEM) model for GPU architectures.
• To demonstrate that a multiway mergesort approach can outperform standard pairwise mergesort in practice on modern GPUs.
• To identify and optimize performance bottlenecks in the initial MMS implementation, particularly in thread communication during merging.

Proposed method

• The algorithm uses a novel parallel partitioning method to distribute input data across multiple threads, exposing high-level parallelism suitable for GPU execution.
• It employs a multiway merging strategy based on a minBlockHeap structure to merge multiple sorted subarrays efficiently.
• The design ensures that all global memory accesses are coalesced and the number of accesses is asymptotically optimal, matching the lower bound in the PEM model.
• Shared memory is used without bank conflicts by carefully structuring data access patterns to avoid simultaneous access to the same bank.
• A bitonic merging network is used within warps to merge small subarrays (32 elements each), though this component is identified as a performance bottleneck.
• The algorithm is implemented and evaluated on three modern GPU architectures to compare with highly optimized libraries like Thrust and MGPU.

Experimental results

Research questions

• RQ1 Can a multiway mergesort algorithm be designed for GPUs that is both I/O-optimal and free of shared memory bank conflicts?
• RQ2 How does the performance of an I/O-optimal, bank conflict-free sorting algorithm compare to highly optimized pairwise mergesort libraries like Thrust and MGPU?
• RQ3 To what extent do bank conflicts in existing GPU sorting libraries degrade performance on non-uniform input distributions?
• RQ4 What are the primary performance bottlenecks in the proposed MMS implementation, and how can they be addressed?
• RQ5 Can the theoretical I/O efficiency of MMS translate into practical performance gains across diverse GPU architectures and input types?

Key findings

• MMS achieves asymptotically optimal global memory access counts, matching the theoretical lower bound in the Parallel External Memory (PEM) model.
• The algorithm is completely free of shared memory bank conflicts, making its performance insensitive to input permutation patterns.
• On random inputs, MMS performs competitively with Thrust and MGPU, achieving similar or slightly better throughput.
• On conflict-heavy inputs, MMS achieves up to 44.3% and 37.6% speedup over Thrust and MGPU, respectively, on the Gibson GPU platform.
• The partitioning phase accounts for less than 2% of total execution time, indicating that the main performance bottleneck lies in the merging phase, particularly in thread communication within the minBlockHeap structure.
• The performance bottleneck in the merging phase is attributed to high communication overhead among 32-thread warps using a bitonic merging network, suggesting that optimization of this component could yield significant performance gains.