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[Paper Review] Automatically Tuning the GCC Compiler to Optimize the Performance of Applications Running on Embedded Systems

Craig Blackmore, Oliver Ray|arXiv (Cornell University)|Feb 23, 2017
Parallel Computing and Optimization Techniques14 references4 citations
TL;DR

This paper presents an automated method to tune GCC compiler flags for embedded systems, generating platform-specific optimization levels (-Ocm3, -Oca8, -Oavr) that outperform -O3 across diverse benchmarks. By using iterative compilation to optimize for a suite of embedded programs rather than individual ones, the approach achieves near-optimal performance gains with minimal overhead, significantly improving speed on ARM Cortex-M3, Cortex-A8, and AVR processors.

ABSTRACT

This paper introduces a novel method for automatically tuning the selection of compiler flags to optimize the performance of software intended to run on embedded hardware platforms. We begin by developing our approach on code compiled by the GNU C Compiler (GCC) for the ARM Cortex-M3 (CM3) processor; and we show how our method outperforms the industry standard -O3 optimization level across a diverse embedded benchmark suite. First we quantify the potential gains by using existing iterative compilation approaches that time-intensively search for optimal configurations for each benchmark. Then we adapt iterative compilation to output a single configuration that optimizes performance across the entire benchmark suite. Although this is a time-consuming process, our approach constructs an optimized variation of -O3, which we call -Ocm3, that realizes nearly two thirds of known available gains on the CM3 and significantly outperforms a more complex state-of-the-art predictive method in cross-validation experiments. Finally, we demonstrate our method on additional platforms by constructing two more optimization levels that find even more significant speed-ups on the ARM Cortex-A8 and 8-bit AVR processors.

Motivation & Objective

  • To develop an automated method for tuning GCC compiler flags to maximize performance on embedded systems without modifying source code or the compiler.
  • To identify a single, platform-wide optimization configuration that outperforms the standard -O3 level across a diverse benchmark suite.
  • To reduce the time and complexity of manual tuning by replacing per-program iterative compilation with a single, reusable optimization level.
  • To generalize the approach to multiple embedded platforms, including ARM Cortex-M3, Cortex-A8, and 8-bit AVR processors.
  • To provide practical, deployable compiler configurations that application developers can use without running time-intensive searches.

Proposed method

  • Using iterative compilation to explore a large space of GCC flag combinations across a representative benchmark suite (BEEBS) for each target platform.
  • Applying a performance-driven search to identify a single configuration that maximizes speedup across all benchmarks, rather than optimizing for individual programs.
  • Constructing new optimization levels (-Ocm3, -Oca8, -Oavr) based on the best-performing flag combinations found during the search.
  • Analyzing the impact of specific flags (e.g., -fno-exceptions, -fno-rtti) removed from -O3 to explain performance improvements.
  • Validating the new configurations using 10-fold cross-validation against a state-of-the-art machine learning approach (1NN).
  • Publishing the final configurations to enable reproducibility and practical adoption by developers.

Experimental results

Research questions

  • RQ1Can a single, platform-specific compiler configuration be automatically generated to outperform -O3 across a diverse set of embedded benchmarks?
  • RQ2To what extent can iterative compilation be adapted to optimize for a benchmark suite rather than individual programs?
  • RQ3How do specific compiler flags in -O3 negatively impact performance on certain embedded architectures, and can they be safely disabled?
  • RQ4Does the automatically generated optimization level generalize well to unseen programs, and how does it compare to machine learning-based prediction methods?
  • RQ5Can this method be extended to other embedded platforms with different instruction sets and performance characteristics?

Key findings

  • The proposed -Ocm3 optimization level achieves nearly two-thirds of the maximum possible performance gain identified through exhaustive iterative compilation on the ARM Cortex-M3.
  • -Ocm3 significantly outperforms both -O3 and a state-of-the-art 1NN machine learning approach in cross-validation experiments on the CM3 platform.
  • The method successfully generated -Oca8 and -Oavr for the ARM Cortex-A8 and 8-bit AVR, respectively, both of which outperform -O3 on their respective platforms.
  • Disabling specific flags like -fno-exceptions and -fno-rtti in -O3 improves performance on the CM3, and the authors provide a detailed explanation for why these flags are detrimental in this context.
  • The new optimization levels generalize well to unseen programs, as demonstrated by consistent performance gains in 10-fold cross-validation.
  • The approach offers a practical, low-overhead alternative to time-intensive per-program iterative compilation, with no need for machine learning or custom training data.

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This review was created by AI and reviewed by human editors.