[Paper Review] Charge-based computing with analogue reconfigurable gates

Alexander Serb, Ali Khiat+1 more|arXiv (Cornell University)|Sep 13, 2017

Advanced Memory and Neural Computing20 references3 citations

TL;DR

This paper introduces a novel charge-based computing paradigm that integrates memristive devices into standard logic gates to enable analogue reconfigurable computation with energy efficiency approaching digital systems. By leveraging memristors to dynamically reconfigure gate behavior, the authors demonstrate a hardware data clusterer and a fuzzy NAND gate, achieving low-power, reconfigurable logic with minimal energy dissipation per charge operation.

ABSTRACT

As the world enters the age of ubiquitous computing, the need for reconfigurable hardware operating close to the fundamental limits of energy consumption becomes increasingly pressing. Simultaneously, scaling-driven performance improvements within the framework of traditional analogue and digital design become progressively more restricted by fundamental physical constraints. Thus, a true paradigm shift in electronics design is required for fuelling the next big burst in technology. Here we lay the foundations of a new design paradigm that fuses analogue and digital thinking by combining digital electronics with memristive devices for achieving charge-based computation; information processing where every dissipated charge counts. This is realised by introducing memristive devices into standard logic gates, thus rendering them reconfigurable and able to perform analogue computation at a power cost close to digital. The power of this concept is then showcased by experimentally demonstrating a hardware data clusterer and a fuzzy NAND gate using this principle.

Motivation & Objective

• To address the growing demand for energy-efficient, reconfigurable hardware in the era of ubiquitous computing.
• To overcome the physical limitations of traditional digital and analogue electronics by fusing digital logic with memristive devices.
• To enable computation where every dissipated charge is accounted for, minimizing energy waste.
• To develop a new design paradigm that combines the reliability of digital systems with the adaptability of analogue computation.
• To demonstrate practical implementations of charge-based computation through experimental prototypes.

Proposed method

• Integrates memristive devices into standard digital logic gates to create reconfigurable gates capable of analogue computation.
• Uses the memristor's resistance state to dynamically alter gate behavior, enabling multiple logic functions from a single physical gate.
• Employs charge-based computation principles where information is processed through controlled charge movement, minimizing energy loss.
• Designs and fabricates a hardware data clusterer using reconfigurable gates to demonstrate adaptive, low-power pattern recognition.
• Develops a fuzzy NAND gate by tuning memristor states to emulate variable threshold logic, enabling graded logic operations.

Experimental results

Research questions

• RQ1 Can memristive devices be effectively integrated into standard logic gates to enable reconfigurable, low-power computation?
• RQ2 How can charge-based computation achieve energy efficiency comparable to digital systems while retaining analogue flexibility?
• RQ3 What are the practical implementations of reconfigurable gates in real-world computational tasks like clustering?
• RQ4 To what extent can memristor states be used to emulate non-binary logic functions such as fuzzy logic?
• RQ5 Can the proposed paradigm scale to complex, energy-constrained computing applications?

Key findings

• The proposed reconfigurable gates achieve power consumption close to digital systems while enabling analogue computation through memristor tuning.
• A hardware data clusterer was successfully demonstrated using the reconfigurable gate architecture, showing adaptability to input patterns.
• The fuzzy NAND gate was experimentally realized, validating the ability to perform graded logic operations with tunable thresholds.
• The system achieves energy efficiency by ensuring every charge dissipated contributes meaningfully to computation.
• The integration of memristors into logic gates enables dynamic reconfiguration without requiring additional circuitry, reducing area and power overhead.