[Paper Review] ConTExT: Leakage-Free Transient Execution

Michael Schwarz, Robert Schilling+4 more|arXiv (Cornell University)|May 22, 2019

Security and Verification in Computing64 references19 citations

TL;DR

ConTExT is a software-hardware co-designed technique that prevents secret data leakage during transient execution by marking sensitive registers and memory as non-transient, ensuring secrets cannot be exfiltrated via microarchitectural side channels. It achieves near-zero performance overhead in real-world workloads while fully mitigating Spectre and microarchitectural data sampling attacks.

ABSTRACT

Out-of-order execution and speculative execution are among the biggest contributors to performance and efficiency of modern processors. However, they are inconsiderate, leaking secret data during the transient execution of instructions. Many solutions have been proposed against transient execution attacks. However, they do not eliminate the leakage entirely or introduce unacceptable performance penalties. In this paper, we propose ConTExT, a Considerate Transient Execution Technique. The basic idea of ConTExT is that secrets can enter registers, but not transiently leave them. ConTExT transforms Spectre from a problem that cannot be solved purely in software [53], to a problem that is not easy to solve, but solvable in software. For this, ConTExT requires minimal modifications of applications, compilers, operating systems, and the hardware. ConTExT offers full protection for secrets in memory and secrets in registers. We evaluate the security and performance of ConTExT. With its principled approach it inherently mitigates the recently found microarchitectural data sampling attacks on small processor buffers. Even when over-approximating, we observe no performance overhead for unprotected code and data, and an overhead of 71.14% for security-critical applications, which is below the overhead of currently recommended state-of-the-art mitigation strategies. The actual overhead of ConTExT is below 1% for real-world workloads.

Motivation & Objective

• Address the fundamental problem of secret data leakage during transient execution in modern out-of-order and speculative processors.
• Overcome the limitations of existing software-only mitigations that either fail to prevent all leakage or impose high performance penalties.
• Provide a solution that is both secure against all known transient execution attacks and efficient enough for practical deployment.
• Enable secure execution without aborting speculative execution, preserving performance for non-sensitive code paths.
• Demonstrate that transient execution can be made secure through architectural modifications that are minimal and compatible with existing systems.

Proposed method

• Repurpose one unused page table bit (e.g., a currently unused PTE bit) to mark memory pages and registers as 'non-transient', preventing their use in transient execution domains.
• Modify applications, compilers, and operating systems to propagate non-transient flags through register transfers and memory accesses.
• Ensure that any secret data loaded into a register is marked non-transient, so it cannot be leaked via microarchitectural channels during speculative execution.
• Use existing uncacheable memory semantics as a practical analog to validate the feasibility of the proposed mechanism.
• Implement a proof-of-concept in a processor simulator and on commodity systems to evaluate security and performance.
• Apply over-approximation techniques (e.g., ConTExT-light) to estimate upper bounds on performance overhead while maintaining strong security guarantees.

Experimental results

Research questions

• RQ1 Can transient execution attacks be fully mitigated without aborting speculative execution or incurring prohibitive performance costs?
• RQ2 Is it possible to prevent secret data from being exfiltrated via microarchitectural side channels during transient execution using only minimal hardware and software changes?
• RQ3 How does the performance overhead of ConTExT compare to existing state-of-the-art mitigation strategies across diverse workloads?
• RQ4 Can the non-transient marking mechanism be applied uniformly across memory and registers to prevent all known covert channels?
• RQ5 To what extent can ConTExT be deployed in existing systems without requiring major architectural redesign?

Key findings

• ConTExT eliminates secret data leakage during transient execution by ensuring that sensitive data cannot be accessed or exfiltrated via any microarchitectural channel.
• The performance overhead for unprotected code and data is negligible, with actual overhead below 1% for most real-world workloads.
• Even under over-approximation, ConTExT-light incurs only 71.14% overhead for security-critical applications, which is lower than the combined overhead of current state-of-the-art mitigation strategies.
• ConTExT provides native protection against all known Spectre variants and recent microarchitectural data sampling attacks, including those targeting small processor buffers.
• The technique is compatible with virtualization, as EPTs can similarly mark pages as non-transient, and the mechanism is independent of virtualization layers.
• The feasibility of the approach is validated by existing uncacheable memory semantics, which already demonstrate that such a mechanism is implementable in modern processors.