[Paper Review] Doing More for Less -- Cache-Aware Parallel Contraction Hierarchies Preprocessing

Dennis Luxen, Dennis Schieferdecker|arXiv (Cornell University)|Aug 13, 2012

Graph Theory and Algorithms5 references3 citations

TL;DR

This paper presents a cache-aware, shared-memory parallel preprocessing algorithm for Contraction Hierarchies (CH) that uses tabulation hashing to achieve high performance with minimal per-core memory overhead. By exploiting cache locality through optimized data structures, the method reduces preprocessing time significantly—achieving up to 25% faster performance than PRAM-optimized theoretical designs—while using only 384 KB per core, making it suitable for planet-scale road networks.

ABSTRACT

Contraction Hierarchies is a successful speedup-technique to Dijkstra's seminal shortest path algorithm that has a convenient trade-off between preprocessing and query times. We investigate a shared-memory parallel implementation that uses $O(n+m)$ space for storing the graph and O(1) space for each core during preprocessing. The presented data structures and algorithms consequently exploits cache locality and thus exhibit competitive preprocessing times. The presented implementation is especially suitable for preprocessing graphs of planet-wide scale in practice. Also, our experiments show that optimal data structures in the PRAM model can be beaten in practice by exploiting memory cache hierarchies.

Motivation & Objective

• To design a parallel CH preprocessing algorithm that minimizes memory overhead per core while maintaining high performance on large-scale road networks.
• To improve cache locality in priority queue data structures during CH preprocessing to reduce memory access latency.
• To demonstrate that practical implementations exploiting memory hierarchy can outperform theoretical PRAM-optimized algorithms in real-world settings.
• To enable efficient preprocessing of planet-scale road networks by reducing per-core memory consumption to a constant 384 KB.
• To evaluate the impact of tabulation hashing on tie-breaking and priority queue storage in CH preprocessing.

Proposed method

• The method uses tabulation hashing to implement a cache-efficient priority queue tie-breaking mechanism with only 384 KB per core, significantly reducing memory footprint.
• It applies a hash function based on table lookups and XOR operations to map node priorities into a compact storage table of size 32,768 entries.
• The algorithm leverages a shared-memory parallel model where each core uses O(1) additional space, enabling efficient scaling on multi-core systems.
• A witness search with a fixed limit on settled nodes is used to determine contraction priorities, ensuring preprocessing efficiency.
• The approach uses a 15-bit hash table (2^15 entries) to store priority queue data, minimizing collisions while reducing memory consumption by 50% compared to full-range tables.
• The implementation uses C++ with GCC -O3 optimizations and is evaluated on AMD Opteron 8-core systems with 128 GB RAM.

Experimental results

Research questions

• RQ1 Can a cache-aware design outperform PRAM-optimized theoretical data structures in practice for CH preprocessing?
• RQ2 How does tabulation hashing impact the performance and memory efficiency of priority queue storage in parallel CH preprocessing?
• RQ3 What is the minimal per-core memory overhead required to achieve competitive preprocessing times on large-scale road networks?
• RQ4 Does exploiting cache locality through optimized data structures reduce preprocessing time despite using simpler hash functions?
• RQ5 How does the performance gap between optimized implementations and theoretical models change as graph size increases?

Key findings

• The tabulation hashing-based implementation (xorbreak) achieved the fastest preprocessing time, outperforming both Boost's unordered_map and Google's dense_hash_map.
• For the planet-scale road network, xorbreak reduced preprocessing time to 15,815.10 seconds, compared to 21,873.58 seconds with the baseline bias-array method.
• The performance gap between xorbreak and xorhash narrowed to just 2% on the planet-scale graph, indicating robustness to increasing data size.
• The xorhash variant used only 384 KB per core, maintaining constant memory overhead regardless of graph size, which improved cache fault resilience.
• The Boost and Google hash table implementations failed to complete the planet-scale preprocessing within 18 hours, highlighting scalability limitations.
• The results show that practical cache-aware designs can surpass theoretical PRAM-optimized algorithms in real-world performance, even with simpler hash functions.