[Paper Review] Efficient Implementation of a Multi-Layer Gradient-Free Online-Trainable Spiking Neural Network on FPGA

Ali Mehrabi, Yeshwanth Bethi+3 more|arXiv (Cornell University)|May 31, 2023

Advanced Memory and Neural Computing4 citations

TL;DR

This paper presents the first FPGA implementation of the Optimized Deep Event-driven Spiking Neural Network Architecture (ODESA), enabling multi-layer, gradient-free, online supervised training with hardware-optimized weight and threshold updates. The system uses event-based binary spikes, local learning rules, and fixed-step updates to achieve 86.6% accuracy on the IRIS dataset with minimal hardware overhead, demonstrating near-software-level performance on resource-constrained edge devices.

ABSTRACT

This paper presents an efficient hardware implementation of the recently proposed Optimized Deep Event-driven Spiking Neural Network Architecture (ODESA). ODESA is the first network to have end-to-end multi-layer online local supervised training without using gradients and has the combined adaptation of weights and thresholds in an efficient hierarchical structure. This research shows that the network architecture and the online training of weights and thresholds can be implemented efficiently on a large scale in hardware. The implementation consists of a multi-layer Spiking Neural Network (SNN) and individual training modules for each layer that enable online self-learning without using back-propagation. By using simple local adaptive selection thresholds, a Winner-Takes-All (WTA) constraint on each layer, and a modified weight update rule that is more amenable to hardware, the trainer module allocates neuronal resources optimally at each layer without having to pass high-precision error measurements across layers. All elements in the system, including the training module, interact using event-based binary spikes. The hardware-optimized implementation is shown to preserve the performance of the original algorithm across multiple spatial-temporal classification problems with significantly reduced hardware requirements.

Motivation & Objective

• To enable efficient, real-time, online training of multi-layer spiking neural networks on resource-constrained hardware without backpropagation.
• To implement a biologically plausible, local learning rule that avoids non-causal error backpropagation and continuous-valued gradients.
• To reduce hardware complexity by using fixed-step updates and integer arithmetic while preserving classification accuracy.
• To demonstrate on-chip, event-driven, asynchronous learning for streaming pattern detection in neuromorphic edge devices.
• To validate the hardware implementation against a software version of ODESA on standard benchmark datasets.

Proposed method

• The system uses a multi-layer SNN with event-based binary spike communication across all components.
• Each layer includes a dedicated training module that performs online, local weight and threshold updates using a modified Hebbian rule.
• Weight updates follow a fixed-step rule: w_ij increases by 2 if target spike time exceeds current weight, otherwise decreases by 2.
• Threshold updates use adaptive step sizes (ΔT) based on current threshold value to prevent underflow, with η_T = 2^-10.
• The training process is accelerated by masking LAS signals to only occur after GAS signals, reducing unnecessary updates.
• The network uses latency coding for input encoding and stores training data in on-chip RAM for hardware restart-based retraining.

Experimental results

Research questions

• RQ1 Can a multi-layer SNN be trained online in hardware without backpropagation or gradient computation?
• RQ2 Can fixed-step, integer-based weight and threshold updates preserve classification accuracy compared to floating-point software implementations?
• RQ3 Does event-driven, asynchronous training with local learning rules achieve competitive performance on standard benchmarks with minimal hardware overhead?
• RQ4 Can the system maintain performance across multiple random data splits with high variance in training dynamics?
• RQ5 How does the hardware-optimized ODESA compare in accuracy and convergence to the original software-based ODESA?

Key findings

• The hardware implementation of ODESA achieved an average accuracy of 79.5% ± 7.2 on the IRIS dataset, with a maximum of 86.6% across 20 random splits.
• The hardware version showed only a minor drop in accuracy compared to the software ODESA (82.8% ± 1.7), despite using fixed-point arithmetic and non-normalized weights.
• The standard deviation of the hardware version (±7.2) was higher than the software version (±1.7), indicating less stable convergence due to fixed-step updates.
• The system successfully implemented online, on-chip training using only on-chip RAM for data storage and event-based spike communication.
• Masking LAS signals to occur only after GAS signals significantly reduced training epochs, accelerating convergence.
• The FPGA implementation achieved high energy efficiency and low resource usage, making it suitable for real-time, continual learning on edge devices.