[Paper Review] Efficient Implementation of the Room Simulator for Training Deep Neural Network Acoustic Models

Chanwoo Kim, Ehsan Variani+2 more|arXiv (Cornell University)|Dec 9, 2017

Speech and Audio Processing32 references3 citations

TL;DR

This paper presents an efficient CPU-based implementation of a room simulator using overlap-add (OLA) filtering with FFTW3 to accelerate data generation for deep neural network acoustic models. By truncating Room Impulse Responses (RIRs) below 20 dB relative to peak power, the method reduces CPU usage from 80% to 9.69% and achieves 37.3× speed-up on Google’s distributed training infrastructure, without degrading speech recognition accuracy on simulated or rerecorded far-field test sets.

ABSTRACT

In this paper, we describe how to efficiently implement an acoustic room simulator to generate large-scale simulated data for training deep neural networks. Even though Google Room Simulator in [1] was shown to be quite effective in reducing the Word Error Rates (WERs) for far-field applications by generating simulated far-field training sets, it requires a very large number of Fast Fourier Transforms (FFTs) of large size. Room Simulator in [1] used approximately 80 percent of Central Processing Unit (CPU) usage in our CPU + Graphics Processing Unit (GPU) training architecture [2]. In this work, we implement an efficient OverLap Addition (OLA) based filtering using the open-source FFTW3 library. Further, we investigate the effects of the Room Impulse Response (RIR) lengths. Experimentally, we conclude that we can cut the tail portions of RIRs whose power is less than 20 dB below the maximum power without sacrificing the speech recognition accuracy. However, we observe that cutting RIR tail more than this threshold harms the speech recognition accuracy for rerecorded test sets. Using these approaches, we were able to reduce CPU usage for the room simulator portion down to 9.69 percent in CPU/GPU training architecture. Profiling result shows that we obtain 22.4 times speed-up on a single machine and 37.3 times speed up on Google's distributed training infrastructure.

Motivation & Objective

• Reduce the high CPU overhead caused by room simulation during deep learning training for far-field speech recognition.
• Address the computational bottleneck of generating large-scale simulated far-field training data using convolutional RIR filtering.
• Investigate the impact of RIR truncation on speech recognition performance to optimize computational efficiency.
• Enable scalable, distributed training by minimizing the computational footprint of the room simulator on CPU/GPU architectures.

Proposed method

• Implement an efficient Overlap-Add (OLA) based filtering method using the open-source FFTW3 library to accelerate convolution operations.
• Apply the image method to model Room Impulse Responses (RIRs) in a 3D cuboid room with reflective walls, using virtual sound sources and distance-based path loss.
• Use a random distribution for reflection coefficients and source positions to generate diverse acoustic environments per training epoch.
• Truncate RIRs beyond the point where power drops below 20 dB relative to the peak amplitude to reduce computation without sacrificing accuracy.
• Integrate the optimized simulator into a CPU/GPU training pipeline, where it generates simulated utterances before feature extraction and model training on GPUs.
• Profile CPU usage and speed-up on both single machines and Google’s Borg cluster to validate performance improvements.

Experimental results

Research questions

• RQ1 What is the minimal RIR length required to maintain speech recognition accuracy in far-field scenarios?
• RQ2 How does truncating RIRs below a certain power threshold affect recognition performance on both simulated and real-world rerecorded test sets?
• RQ3 To what extent can OLA-based filtering with FFTW3 reduce CPU usage in a CPU/GPU training pipeline?
• RQ4 Can significant speed-up be achieved in distributed training environments without degrading model accuracy?

Key findings

• Truncating RIRs below 20 dB relative to peak power results in no measurable degradation in word error rate (WER) on both simulated and rerecorded far-field test sets.
• Cutting RIRs below 5 dB relative to peak power significantly harms recognition accuracy, especially in reverberant conditions, indicating that long-tail RIR components are essential for robustness.
• The optimized OLA-based filtering with FFTW3 reduces CPU usage for the room simulator from 80% to 9.69% in the CPU/GPU training architecture.
• The method achieves a 22.4× speed-up on a single machine and a 37.3× speed-up on Google’s distributed Borg cluster.
• The performance gain is primarily due to reduced FFT computation from RIR truncation and efficient OLA filtering with FFTW3.
• The approach enables scalable, high-throughput data augmentation for far-field speech recognition without compromising model accuracy.