[Paper Review] High-Speed Serial Optical Link Test Bench Using FPGA with Embedded Transceivers

Chonghan Liu, D. Gong+7 more|arXiv (Cornell University)|Jan 1, 2009

VLSI and Analog Circuit Testing4 references3 citations

TL;DR

This paper presents an FPGA-based Bit Error Rate Tester (BERT) using Altera's Stratix II GX transceivers to evaluate high-speed optical links at 5 Gbps. It demonstrates comparable receiver sensitivity to commercial BERTs, analyzes 8B/10B encoding effects, and reveals asymmetric bit flip behavior and higher word errors due to error propagation, with total word errors less than twice the non-coded case.

ABSTRACT

We develop a custom Bit Error Rate test bench based on Altera's Stratix II GX transceiver signal integrity development kit, demonstrate it on point-to-point serial optical link with data rate up to 5 Gbps, and compare it with commercial stand alone tester. The 8B/10B protocol is implemented and its effects studied. A variable optical attenuator is inserted in the fibre loop to induce transmission degradation and to measure receiver sensitivity. We report comparable receiver sensitivity results using the FPGA based tester and commercial tester. The results of the FPGA also shows that there are more one-to-zero bit flips than zero-to-one bit flips at lower error rate. In 8B/10B coded transmission, there are more word errors than bit flips, and the total error rate is less than two times that of non-coded transmission. Total error rate measured complies with simulation results, according to the protocol setup.

Motivation & Objective

• To develop a low-cost, customizable FPGA-based BERT for high-speed optical link characterization.
• To evaluate receiver sensitivity of a 5 Gbps point-to-point optical link using both non-coded and 8B/10B-coded data.
• To study the impact of 8B/10B encoding on bit and word error rates, including error propagation dynamics.
• To compare FPGA-based BERT results with commercial standalone BERTs for validation.
• To investigate asymmetric bit flip behavior (1-to-0 vs. 0-to-1) in optical receiver circuits.

Proposed method

• Implemented a custom BERT using Altera Stratix II GX FPGA with embedded transceivers and FTDI USB interface for PC communication.
• Generated 5 Gbps PRBS-2^27 data streams via the FPGA’s transceiver, driving SFP+ modules for optical transmission over OM3 fiber.
• Inserted a variable optical attenuator in the fiber loop to simulate link degradation and measure receiver sensitivity across optical power levels.
• Integrated 8B/10B encoding/decoding blocks in the FPGA path, with configurable bypass for non-coded comparisons.
• Used LabVIEW-based GUI for real-time configuration download and error logging upload.
• Conducted Monte Carlo simulations of error propagation in 8B/10B coding and validated with experimental measurements.

Experimental results

Research questions

• RQ1 Does an FPGA-based BERT achieve receiver sensitivity comparable to commercial standalone BERTs in 5 Gbps optical links?
• RQ2 How does 8B/10B encoding affect bit and word error rates in high-speed serial optical transmission?
• RQ3 What is the distribution of error propagation in 8B/10B-coded data streams following a single bit flip?
• RQ4 Why are there more 1-to-0 bit flips than 0-to-1 bit flips at low error rates?
• RQ5 How do measured error rates for 8B/10B-coded transmission compare to simulation and non-coded transmission?

Key findings

• The FPGA-based BERT achieved receiver sensitivity results that are comparable to those of a commercial standalone BERT across multiple SFP+ modules and fiber lengths.
• At low error rates, there were significantly more 1-to-0 bit flips than 0-to-1 bit flips, attributed to asymmetries in the optical receiver’s post-amplification circuitry.
• For 8B/10B-coded transmission, word errors exceeded bit errors, with 50% of word errors occurring in the first word after a bit flip.
• Total word error rates in 8B/10B transmission were less than two times higher than in non-coded transmission, matching simulation predictions.
• Error propagation from a single bit flip primarily affected the first word (51.35% on average) and second word (13.92%), with minimal impact beyond the second word.
• Measured error rates for both non-coded and 8B/10B-coded data were consistent with Monte Carlo simulation results, validating the model and implementation.