[Paper Review] Joint Channel Estimation and Data Decoding using SVM-based Receivers.

Sami Akın, Maxim Penner+1 more|arXiv (Cornell University)|Dec 4, 2020

Wireless Signal Modulation Classification19 references4 citations

TL;DR

This paper proposes a joint channel estimation and data decoding receiver using support vector machines (SVMs) that integrates pilot-based channel estimation, demodulation, and decoding into a single SVM-based framework. It demonstrates that the SVM receiver achieves performance close to maximum likelihood decoding and outperforms conventional block-wise receivers, even when trained on 1-bit ADC outputs.

ABSTRACT

Modern communication systems organize receivers in blocks in order to simplify their analysis and design. However, an approach that considers the receiver design from a wider perspective rather than treating it block-by-block may take advantage of the impacts of these blocks on each other and provide better performance. Herein, we can benefit from machine learning and compose a receiver model implementing supervised learning techniques. With this motivation, we consider a one-to-one transmission system over a flat fast fading wireless channel and propose a support vector machines (SVM)-based receiver that combines the pilot-based channel estimation, data demodulation and decoding processes in one joint operation. We follow two techniques in the receiver design. We first design one SVM-based classifier that outputs the class of the encoding codeword that enters the encoder at the transmitter side. Then, we put forward a model with one SVM-based classifier per one bit in the encoding codeword, where each classifier assigns the value of the corresponding bit in the encoding vector. With the second technique, we simplify the receiver design especially for longer encoding codewords. We show that the SVM-based receiver performs very closely to the maximum likelihood decoder, which is known to be the optimal decoding strategy when the encoding vectors at the transmitter are equally likely. We further show that the SVM-based receiver outperforms the conventional receivers that perform channel estimation, data demodulation and decoding in blocks. Finally, we show that we can train the SVM-based receiver with 1-bit analog-to-digital converter (ADC) outputs and the SVM-based receiver can perform very closely to the conventional receivers that take 32-bit ADC outputs as inputs.

Motivation & Objective

• To overcome the limitations of block-wise receiver design in modern communication systems by integrating channel estimation, demodulation, and decoding into a unified framework.
• To leverage supervised machine learning, specifically SVMs, to improve receiver performance by exploiting inter-block dependencies.
• To design a receiver that maintains high performance even with low-resolution ADCs, such as 1-bit quantization.
• To simplify receiver complexity for long codewords by using per-bit SVM classifiers instead of full-codeword classification.
• To demonstrate that SVM-based receivers can approach the performance of optimal maximum likelihood decoding.

Proposed method

• Design a single SVM classifier to output the class of the transmitted encoding codeword, treating the entire codeword as a single classification task.
• Propose an alternative model with one SVM classifier per bit in the codeword, enabling scalable design for longer codewords.
• Train the SVM-based receiver using labeled training data derived from known pilot symbols and transmitted codewords.
• Utilize 1-bit analog-to-digital converter (ADC) outputs as input features to the SVM, reducing hardware complexity.
• Formulate the joint estimation and decoding problem as a supervised learning task, where the SVM learns the mapping from received signals to transmitted codewords.
• Apply kernel methods in SVMs to handle non-linear signal distortions in fast fading channels.

Experimental results

Research questions

• RQ1 Can a joint receiver design using SVMs outperform conventional block-wise receivers in terms of bit error rate?
• RQ2 To what extent can a receiver trained on 1-bit ADC outputs match the performance of a conventional 32-bit ADC receiver?
• RQ3 Does the per-bit SVM classifier model reduce complexity while maintaining high accuracy for long codewords?
• RQ4 How close can an SVM-based receiver perform to the optimal maximum likelihood decoder?
• RQ5 Can inter-block dependencies be effectively exploited through a unified SVM-based receiver architecture?

Key findings

• The SVM-based receiver achieves performance very close to the maximum likelihood decoder, which is the optimal benchmark for equally likely codewords.
• The proposed receiver outperforms conventional block-wise receivers that perform channel estimation, demodulation, and decoding sequentially.
• The SVM receiver trained on 1-bit ADC outputs performs nearly as well as conventional receivers using 32-bit ADC inputs, demonstrating robustness to low-resolution quantization.
• The per-bit SVM classifier model significantly simplifies receiver design, especially for long encoding codewords, without sacrificing performance.
• The joint SVM-based receiver effectively exploits inter-block dependencies, leading to improved error rate performance compared to block-independent processing.