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[Paper Review] LazyPIM: Efficient Support for Cache Coherence in Processing-in-Memory Architectures

Amirali Boroumand, Saugata Ghose|arXiv (Cornell University)|Jun 10, 2017
Parallel Computing and Optimization Techniques14 references17 citations
TL;DR

LazyPIM proposes a speculative, signature-based cache coherence mechanism for Processing-in-Memory (PIM) architectures that reduces off-chip traffic by batching coherence checks until kernel completion. By using compressed coherence signatures to detect conflicts and rolling back only when necessary, LazyPIM improves average performance by 19.6%, reduces off-chip traffic by 30.9%, and cuts energy use by 18.0% compared to prior approaches.

ABSTRACT

Processing-in-memory (PIM) architectures have seen an increase in popularity recently, as the high internal bandwidth available within 3D-stacked memory provides greater incentive to move some computation into the logic layer of the memory. To maintain program correctness, the portions of a program that are executed in memory must remain coherent with the portions of the program that continue to execute within the processor. Unfortunately, PIM architectures cannot use traditional approaches to cache coherence due to the high off-chip traffic consumed by coherence messages, which, as we illustrate in this work, can undo the benefits of PIM execution for many data-intensive applications. We propose LazyPIM, a new hardware cache coherence mechanism designed specifically for PIM. Prior approaches for coherence in PIM are ill-suited to applications that share a large amount of data between the processor and the PIM logic. LazyPIM uses a combination of speculative cache coherence and compressed coherence signatures to greatly reduce the overhead of keeping PIM coherent with the processor, even when a large amount of sharing exists.We find that LazyPIM improves average performance across a range of data-intensive PIM applications by 19.6%, reduces off-chip traffic by 30.9%, and reduces energy consumption by 18.0%, over the best prior approaches to PIM coherence.

Motivation & Objective

  • To address the high off-chip traffic caused by traditional cache coherence protocols in PIM architectures, which undermines PIM's performance benefits.
  • To enable efficient, scalable cache coherence in PIM for data-intensive workloads with high data sharing between processor and PIM cores.
  • To maintain compatibility with conventional multithreaded programming models while minimizing coherence-related communication.
  • To reduce energy consumption and off-chip bandwidth usage in PIM systems without sacrificing correctness or performance.

Proposed method

  • LazyPIM uses speculative execution, where PIM cores assume coherence permissions without sending immediate coherence requests.
  • It maintains all data updates speculatively in the PIM cache during kernel execution.
  • After kernel completion, the PIM core sends a compressed coherence signature to the processor to check for conflicts.
  • The processor uses the signature to detect if any data was modified by the processor after the PIM kernel read it.
  • If a conflict is detected, the processor flushes dirty lines and the PIM kernel is re-executed.
  • The use of compressed signatures (e.g., 2K–8K bits) reduces false positives and minimizes off-chip traffic.

Experimental results

Research questions

  • RQ1Can a speculative, batched coherence mechanism reduce off-chip traffic in PIM architectures without sacrificing correctness?
  • RQ2How effective is compressed coherence signature-based conflict detection in minimizing false positives and rollbacks?
  • RQ3To what extent can speculative coherence maintain performance and energy efficiency in data-intensive PIM workloads with high data sharing?
  • RQ4How does the choice of signature size affect the trade-off between conflict detection accuracy and off-chip communication overhead?

Key findings

  • LazyPIM improves average performance across data-intensive PIM applications by 19.6% compared to the best prior coherence approaches.
  • It reduces off-chip traffic by 30.9% by batching coherence checks and minimizing real-time coherence message exchanges.
  • Energy consumption is reduced by 18.0% due to lower communication overhead and fewer re-executions.
  • Using an 8K-bit signature reduces conflict rates by 30% on average, but increases off-chip traffic by 30–33%, making 2K-bit signatures more efficient overall.
  • The 2K-bit signature configuration achieves the best balance between performance and communication cost across all evaluated workloads.
  • LazyPIM enables correct, high-performance PIM execution while preserving the conventional multithreaded programming model, unlike prior approaches that require restrictive programming models.

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This review was created by AI and reviewed by human editors.