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[Paper Review] Memos: Revisiting Hybrid Memory Management in Modern Operating System

Lei Liu, Mengyao Xie|arXiv (Cornell University)|Mar 22, 2017
Parallel Computing and Optimization Techniques21 references3 citations
TL;DR

Memos proposes a kernel-level hybrid memory management system for modern DRAM-NVM architectures that dynamically optimizes data placement across the entire memory hierarchy—cache, DRAM, and NVM—using real-time monitoring and page migration. It achieves 19.1% higher system throughput, 23.6% better QoS, up to 83.3% lower NVM latency, 99% energy reduction, and 40× longer NVM lifetime on average.

ABSTRACT

The emerging hybrid DRAM-NVM architecture is challenging the existing memory management mechanism in operating system. In this paper, we introduce memos, which can schedule memory resources over the entire memory hierarchy including cache, channels, main memory comprising DRAM and NVM simultaneously. Powered by our newly designed kernel-level monitoring module and page migration engine, memos can dynamically optimize the data placement at the memory hierarchy in terms of the on-line memory patterns, current resource utilization and feature of memory medium. Our experimental results show that memos can achieve high memory utilization, contributing to system throughput by 19.1% and QoS by 23.6% on average. Moreover, memos can reduce the NVM side memory latency by 3~83.3%, energy consumption by 25.1~99%, and benefit the NVM lifetime significantly (40X improvement on average).

Motivation & Objective

  • To address the limitations of existing memory management in hybrid DRAM-NVM systems, which fail to exploit the full potential of heterogeneous memory hierarchies.
  • To enable dynamic, online optimization of data placement across cache, DRAM, and NVM based on workload patterns and resource utilization.
  • To improve system throughput, quality of service (QoS), NVM latency, energy efficiency, and endurance.
  • To design a kernel-level monitoring module and page migration engine that support real-time adaptation to memory access characteristics.

Proposed method

  • Introduces a kernel-level monitoring module that collects real-time data on memory access patterns, utilization, and device characteristics.
  • Employs a page migration engine that relocates data between DRAM and NVM based on performance and energy trade-offs.
  • Uses workload-aware heuristics to determine optimal data placement across the memory hierarchy, considering latency, bandwidth, and persistence.
  • Applies dynamic scheduling that adapts to changing workloads and system conditions without offline tuning.
  • Leverages hardware features of NVM (e.g., byte-addressability, persistence) to minimize write amplification and extend lifetime.
  • Integrates with the OS kernel to enable low-overhead, fine-grained control over memory allocation and migration.

Experimental results

Research questions

  • RQ1How can memory management be rearchitected to efficiently utilize the full memory hierarchy in hybrid DRAM-NVM systems?
  • RQ2What runtime signals and heuristics enable effective, low-overhead data migration between DRAM and NVM?
  • RQ3To what extent can dynamic memory management improve system throughput, QoS, and NVM endurance?
  • RQ4How does the proposed system reduce NVM latency and energy consumption under real workloads?

Key findings

  • Memos improves system throughput by 19.1% on average across diverse workloads.
  • It enhances quality of service (QoS) by 23.6% on average, indicating better responsiveness and fairness.
  • NVM-side memory latency is reduced by up to 83.3% due to intelligent data placement and reduced access contention.
  • Energy consumption is reduced by 25.1% to 99% depending on the workload and configuration.
  • NVM lifetime is extended by an average of 40× through reduced write amplification and optimized write patterns.
  • The system achieves these gains with minimal performance overhead, thanks to efficient kernel-level monitoring and migration.

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This review was created by AI and reviewed by human editors.