[Paper Review] Near-optimal adjacency labeling scheme for power-law graphs

Casper Petersen, Noy Rotbart+2 more|arXiv (Cornell University)|Feb 13, 2015

Complex Network Analysis Techniques54 references3 citations

TL;DR

This paper presents a near-optimal adjacency labeling scheme for power-law graphs, using a threshold-based partitioning of high- and low-degree vertices and a degree distribution-based threshold prediction. The scheme achieves an upper bound of $ O(\sqrt[\alpha]{n}(\log n)^{1-1/\alpha}) $ bits per label, with a matching lower bound of $ \Omega(\sqrt[\alpha]{n}) $, proving asymptotic optimality up to a logarithmic factor, and validates its efficiency experimentally on real and synthetic networks.

ABSTRACT

An adjacency labeling scheme is a method that assigns labels to the vertices of a graph such that adjacency between vertices can be inferred directly from the assigned label, without using a centralized data structure. We devise adjacency labeling schemes for the family of power-law graphs. This family that has been used to model many types of networks, e.g. the Internet AS-level graph. Furthermore, we prove an almost matching lower bound for this family. We also provide an asymptotically near- optimal labeling scheme for sparse graphs. Finally, we validate the efficiency of our labeling scheme by an experimental evaluation using both synthetic data and real-world networks of up to hundreds of thousands of vertices.

Motivation & Objective

• To design an efficient adjacency labeling scheme tailored for power-law graphs, which model real-world networks like the Internet AS-level graph.
• To establish theoretical bounds on label size for power-law graphs, proving near-optimality of the proposed scheme.
• To validate the practical efficiency of the labeling scheme through experiments on real-world and synthetic networks with up to hundreds of thousands of vertices.
• To extend the scheme to directed graphs with a single additional bit per label.
• To explore connections between adjacency labeling schemes and induced universal graphs for power-law families.

Proposed method

• The scheme partitions vertices into high-degree ('fat') and low-degree ('thin') based on a threshold derived from the power-law exponent $ \alpha $.
• It uses a threshold prediction based on fitting a power-law curve to the degree distribution, ensuring label size depends only on $ \alpha $ and $ n $.
• The labeling strategy assigns labels that encode neighborhood information using a combination of vertex degree and adjacency patterns.
• The method leverages the structural properties of power-law graphs, particularly the sparse nature of high-degree vertices, to minimize label size.
• The scheme supports directed graphs by adding one bit per label to encode edge orientation.
• Theoretical analysis uses induced universal graph constructions to derive lower bounds, linking labeling schemes to universal graph theory.

Experimental results

Research questions

• RQ1 Can an adjacency labeling scheme for power-law graphs achieve label size close to the information-theoretic lower bound?
• RQ2 How does the performance of the proposed labeling scheme compare to general graph labeling schemes on real-world networks?
• RQ3 To what extent does the threshold prediction based on $ \alpha $ approximate the optimal threshold for minimizing label size?
• RQ4 What is the practical label size overhead when the degree distribution deviates slightly from a perfect power law?
• RQ5 Can the labeling scheme be efficiently adapted to dynamic or partially known network topologies?

Key findings

• The proposed adjacency labeling scheme achieves a label size of $ O(\sqrt[\alpha]{n}(\log n)^{1-1/\alpha}) $ bits per vertex for power-law graphs.
• A matching lower bound of $ \Omega(\sqrt[\alpha]{n}) $ bits is proven, showing the scheme is asymptotically optimal up to a $ (\log n)^{1-1/\alpha} $ factor.
• For synthetic power-law graphs, the scheme's maximum label size is at most 3% larger than the optimal empirical threshold.
• For real-world graphs like Enron, the label size is at most 23% larger than the empirical optimum, due to minor deviations from pure power-law behavior.
• In practice, label sizes are substantially lower than theoretical upper bounds—often below 1 kilobyte per vertex—indicating strong practical efficiency.
• The scheme can be extended to directed graphs with only one additional bit per label, maintaining efficiency.