[Paper Review] Project Beehive: A Hardware/Software Co-designed Stack for Runtime and Architectural Research

Christos Kotselidis, Andrey Rodchenko+15 more|arXiv (Cornell University)|Sep 14, 2015

Parallel Computing and Optimization Techniques29 references3 citations

TL;DR

Project Beehive presents a full-stack, hardware/software co-designed platform enabling rapid prototyping and experimentation for runtime and architectural research across diverse heterogeneous systems. By integrating co-designed compilers, runtimes, and accelerators (GPGPU, SIMD, FPGA), it achieves up to 43x performance improvement in a complex Computer Vision workload (KFusion), demonstrating effective co-design across application, language, and hardware layers.

ABSTRACT

The end of Dennard scaling combined with stagnation in architectural and compiler optimizations makes it challenging to achieve significant performance deltas. Solutions based solely in hardware or software are no longer sufficient to maintain the pace of improvements seen during the past few decades. In hardware, the end of single-core scaling resulted in the proliferation of multi-core system architectures, however this has forced complex parallel programming techniques into the mainstream. To further exploit physical resources, systems are becoming increasingly heterogeneous with specialized computing elements and accelerators. Programming across a range of disparate architectures requires a new level of abstraction that programming languages will have to adapt to. In software, emerging complex applications, from domains such as Big Data and computer vision, run on multi-layered software stacks targeting hardware with a variety of constraints and resources. Hence, optimizing for the power-performance (and resiliency) space requires experimentation platforms that offer quick and easy prototyping of hardware/software co-designed techniques. To that end, we present Project Beehive: A Hardware/Software co-designed stack for runtime and architectural research. Project Beehive utilizes various state-of-the-art software and hardware components along with novel and extensible co-design techniques. The objective of Project Beehive is to provide a modern platform for experimentation on emerging applications, programming languages, compilers, runtimes, and low-power heterogeneous many-core architectures in a full-system co-designed manner.

Motivation & Objective

• To address the growing complexity of modern computing stacks, where hardware and software advancements have decoupled, requiring co-design for optimal performance, power, and resilience.
• To overcome the limitations of monolithic hardware or software-only solutions in heterogeneous, many-core, and domain-specific architectures.
• To enable rapid, full-system experimentation across programming languages, compilers, runtimes, and diverse hardware platforms (ARM, x86, FPGAs, GPUs).
• To unify and extend runtime and compiler support for dynamic and non-dynamic languages across multiple ISAs.
• To provide a flexible, extensible platform for co-designed optimization of power, performance, and resilience in emerging workloads like Big Data and Computer Vision.

Proposed method

• Integrates a unified runtime layer supporting multiple ISAs (ARMv7, Aarch64, x86) and multiple programming languages via production and research-grade virtual machines.
• Employs novel co-design modules—Tornado (GPGPU), Indigo (SIMD), and MAST (FPGA)—to enable transparent heterogeneous execution without productivity loss.
• Uses high-performance simulators and real hardware in a unified framework to support architectural research and optimization.
• Applies hardware-aware JVM extensions, such as tagging unused bits in pointers to encode metadata, reducing object header size and improving cache efficiency.
• Enables application-level co-design through a full-stack approach, from high-level code (e.g., Java-based KinectFusion) to micro-architectural optimizations.
• Supports dynamic and static analysis across the stack, allowing iterative experimentation and optimization across the entire system.

Experimental results

Research questions

• RQ1 How can a unified hardware/software co-design platform enable rapid prototyping and experimentation across diverse architectures and programming models?
• RQ2 What are the performance, energy, and memory efficiency gains from co-designing JVM object layout with micro-architectural support?
• RQ3 To what extent can a single software stack accelerate complex, real-world applications like KinectFusion across GPGPU, SIMD, and FPGA platforms?
• RQ4 How do co-designed compiler and runtime optimizations impact application-level performance and system-level metrics like cache utilization and DRAM energy?
• RQ5 What is the impact of architectural-level optimizations—such as object header compression—on end-to-end application performance and garbage collection overhead?

Key findings

• The Beehive platform achieved up to 43x performance improvement in the KFusion Computer Vision application through co-designed acceleration on GPGPU, FPGA, and JVM-optimized object layouts.
• Class information elimination in object headers reduced object size by one word, resulting in a 1.32x speedup (average 1.10x) across SLAMBench stages.
• The same optimization reduced dynamic DRAM energy by up to 27%, total DRAM energy by 12%, and total dynamic energy by 5%.
• Cache utilization improved by 24% in L2 and 25% in L3 caches due to better data locality from smaller object sizes.
• Garbage collection invocations were reduced from 10 to 7 due to heap space savings from object header compression.
• The platform successfully enabled real-time 3D space reconstruction (>30 fps) of the KFusion application through multi-faceted co-design across software, runtime, and hardware layers.