[Paper Review] Reactive NaN Repair for Applying Approximate Memory to Numerical Applications

Shinsuke Hamada, Soramichi Akiyama+1 more|arXiv (Cornell University)|Mar 26, 2018

Parallel Computing and Optimization Techniques11 references3 citations

TL;DR

This paper proposes a reactive NaN repair mechanism for approximate main memory in numerical HPC and AI workloads, using x86 floating-point exceptions to detect and repair NaNs on-the-fly while ignoring non-fatal numerical errors. The method incurs negligible overhead, enabling energy-efficient approximate computing without compromising result validity.

ABSTRACT

Applications in the AI and HPC fields require much memory capacity, and the amount of energy consumed by main memory of server machines is ever increasing. Energy consumption of main memory can be greatly reduced by applying approximate computing in exchange for increased bit error rates. AI and HPC applications are to some extent robust to bit errors because small numerical errors are amortized by their iterative nature. However, a single occurrence of a NaN due to bit-flips corrupts the whole calculation result. The issue is that fixing every bit-flip using ECC incurs too much overhead because the bit error rate is much higher than in normal environments. We propose a low-overhead method to fix NaNs when approximate computing is applied to main memory. The main idea is to reactively repair NaNs while leaving other non-fatal numerical errors as-is to reduce the overhead. We implemented a prototype by leveraging floating-point exceptions of x86 CPUs, and the preliminary evaluations showed that our method incurs negligible overhead.

Motivation & Objective

• Address the critical problem that a single NaN due to bit-flips can corrupt entire numerical computations in approximate memory.
• Reduce energy consumption of main memory in HPC and AI workloads by applying approximate computing with higher bit error rates.
• Minimize overhead by avoiding full error correction via ECC, focusing only on fatal NaN errors instead of all bit-flips.
• Enable practical deployment of approximate memory in numerical applications by ensuring result integrity through targeted NaN repair.
• Provide a flexible, low-overhead solution that adapts to application-specific NaN recovery semantics without hardware lock-in.

Proposed method

• Leverage x86 floating-point exception mechanisms to detect NaNs generated during floating-point operations in real time.
• Implement a reactive repair handler that intercepts floating-point exceptions triggered by NaNs and replaces the NaN with a safe, application-specific value.
• Leave non-fatal numerical errors (e.g., small bit-flips that do not produce NaNs) uncorrected to avoid unnecessary overhead.
• Use a software-based exception handling mechanism to avoid the high cost of hardware-based ECC correction for all bit-flips.
• Design the repair logic to be extensible, allowing different values (e.g., 0.0, 1.0, or other heuristics) to be used based on application context.
• Integrate the repair mechanism into a prototype system using standard x86 instruction set extensions to ensure compatibility and low runtime cost.

Experimental results

Research questions

• RQ1 Can a reactive, exception-driven approach repair NaNs in approximate main memory with negligible performance overhead?
• RQ2 Is it feasible to avoid full ECC correction by selectively repairing only NaNs, while tolerating non-fatal numerical errors?
• RQ3 How does the proposed method compare in overhead to traditional ECC-based error correction in approximate memory systems?
• RQ4 Can the method be applied effectively to numerical workloads in HPC and AI that are robust to small errors but sensitive to NaN propagation?
• RQ5 What are the practical implications of fixing NaNs with application-specific values instead of relying on hardware error correction?

Key findings

• The proposed reactive NaN repair method incurs negligible performance overhead, as confirmed by preliminary evaluations on x86-based prototypes.
• Fixing only NaNs rather than all bit-flips significantly reduces the cost of error resilience compared to full ECC correction.
• The method is effective in preventing catastrophic failure due to NaN propagation in matrix operations and linear algebra computations.
• The approach is compatible with existing x86 floating-point exception mechanisms, enabling efficient integration without architectural changes.
• Non-fatal numerical errors (e.g., small bit-flips not producing NaNs) can be safely ignored, as they are amortized by the iterative nature of HPC and AI workloads.
• The method provides a flexible foundation for future work on determining optimal NaN-repair values based on workload characteristics.