[Paper Review] SoK: Design Tools for Side-Channel-Aware Implementations

Ileana Buhan, Lejla Batina+2 more|arXiv (Cornell University)|Apr 17, 2021

Security and Verification in Computing71 references4 citations

TL;DR

This paper presents a systematic survey and taxonomy of automated tools for detecting side-channel leaks in cryptographic implementations, classifying them by model source (device measurements vs. design specifications) and abstraction level. It identifies key challenges in simulation fidelity, lack of standardized metrics, and limited support for complex architectures and EM side channels, while advocating for unified benchmarks and early-stage design-time analysis to improve security and efficiency in hardware development.

ABSTRACT

Side-channel attacks that leak sensitive information through a computing device's interaction with its physical environment have proven to be a severe threat to devices' security, particularly when adversaries have unfettered physical access to the device. Traditional approaches for leakage detection measure the physical properties of the device. Hence, they cannot be used during the design process and fail to provide root cause analysis. An alternative approach that is gaining traction is to automate leakage detection by modeling the device. The demand to understand the scope, benefits, and limitations of the proposed tools intensifies with the increase in the number of proposals. In this SoK, we classify approaches to automated leakage detection based on the model's source of truth. We classify the existing tools on two main parameters: whether the model includes measurements from a concrete device and the abstraction level of the device specification used for constructing the model. We survey the proposed tools to determine the current knowledge level across the domain and identify open problems. In particular, we highlight the absence of evaluation methodologies and metrics that would compare proposals' effectiveness from across the domain. We believe that our results help practitioners who want to use automated leakage detection and researchers interested in advancing the knowledge and improving automated leakage detection.

Motivation & Objective

• To provide a comprehensive survey of automated tools for detecting side-channel leaks in cryptographic hardware implementations.
• To classify existing tools based on their model source (device measurements or design specifications) and abstraction level of the device model.
• To identify open problems in simulation fidelity, evaluation metrics, and tool interoperability across the design lifecycle.
• To highlight the lack of standardized benchmarks and metrics for comparing tool effectiveness across the domain.
• To advocate for early-stage (pre-silicon) leakage detection to reduce cost and improve security assurance.

Proposed method

• The authors classify tools along two axes: whether the model is derived from physical measurements (post-silicon) or design specifications (pre-silicon), and the abstraction level of the device model.
• They analyze tools based on their ability to model micro-architectural features such as pipeline stalls, cache misses, and instruction-level power variations.
• The study evaluates the feasibility of EM simulation, concluding that EM simulators require physical device measurements and are currently limited to open-source hardware.
• The authors examine the composability of pre-silicon simulators and identify challenges in removing non-leaking design elements to improve simulation speed.
• They propose the need for public, representative datasets to enable fair comparison of tools, especially non-open-source ones.
• The taxonomy is grounded in a survey of 70+ tools and case studies, with emphasis on symmetric and asymmetric cryptographic implementations.

Experimental results

Research questions

• RQ1 How do existing automated side-channel detection tools differ in their model source (measurements vs. design specs) and abstraction level?
• RQ2 What are the key limitations in modeling complex micro-architectural features such as pipeline stalls and cache misses in post-silicon simulators?
• RQ3 Why is electromagnetic (EM) simulation particularly challenging, and what constraints limit its development?
• RQ4 What metrics are currently available to quantify side-channel leakage at the micro-architectural level, and why is standardization lacking?
• RQ5 How can tool evaluation and comparison be improved in the absence of public benchmarks or open-source implementations?

Key findings

• Pre-silicon simulators can detect leaks early in the design process, reducing cost and enabling design modifications before fabrication.
• Post-silicon simulators rely heavily on physical measurements, limiting their use when design information is unavailable.
• No widely accepted metrics exist for quantifying micro-architectural side-channel leaks, hindering cross-tool comparison.
• EM simulation remains a major challenge, with only one known tool (EMSIM) that requires physical device measurements and is limited to simple, open-source processors.
• There is a lack of public benchmarks and case studies for asymmetric cryptographic implementations, which are underrepresented in current tooling.
• Composability of pre-silicon simulators is limited by the absence of reusable, modular components that exclude non-leaking design elements.