[Paper Review] Bayesian Optimization for Macro Placement

Changyong Oh, Roberto Bondesan+7 more|arXiv (Cornell University)|Jul 18, 2022

VLSI and FPGA Design Techniques4 citations

TL;DR

This paper proposes a batch Bayesian optimization (BO) framework for macro placement using sequence pairs as a combinatorial representation, enabling sample-efficient, parallel optimization of half-perimeter wirelength (HPWL) under expensive-to-evaluate real objectives. The method outperforms traditional simulated annealing and leverages Gaussian process surrogates with a local search-enhanced acquisition function to accelerate convergence on real chip design workloads.

ABSTRACT

Macro placement is the problem of placing memory blocks on a chip canvas. It can be formulated as a combinatorial optimization problem over sequence pairs, a representation which describes the relative positions of macros. Solving this problem is particularly challenging since the objective function is expensive to evaluate. In this paper, we develop a novel approach to macro placement using Bayesian optimization (BO) over sequence pairs. BO is a machine learning technique that uses a probabilistic surrogate model and an acquisition function that balances exploration and exploitation to efficiently optimize a black-box objective function. BO is more sample-efficient than reinforcement learning and therefore can be used with more realistic objectives. Additionally, the ability to learn from data and adapt the algorithm to the objective function makes BO an appealing alternative to other black-box optimization methods such as simulated annealing, which relies on problem-dependent heuristics and parameter-tuning. We benchmark our algorithm on the fixed-outline macro placement problem with the half-perimeter wire length objective and demonstrate competitive performance.

Motivation & Objective

• To address the challenge of expensive, black-box objective evaluation in macro placement, where traditional methods like simulated annealing require extensive tuning and lack adaptability.
• To replace heuristic-based optimization with a data-driven, sample-efficient approach that learns from prior evaluations and adapts to the objective landscape.
• To enable parallel evaluation of multiple sequence pairs via batch acquisition functions, accelerating convergence in large-scale physical design workloads.
• To demonstrate competitive performance on fixed-outline macro placement with half-perimeter wirelength (HPWL) as the objective, using real evaluation costs.
• To provide a scalable, generalizable framework for macro placement that can be extended to other physical design objectives.

Proposed method

• Employs Bayesian optimization (BO) with a Gaussian process (GP) surrogate model to predict HPWL based on sequence pair configurations, modeling uncertainty via predictive mean and variance.
• Uses a batch acquisition function to select multiple sequence pairs in parallel, maximizing expected improvement while balancing exploration and exploitation.
• Applies a local update function (Algorithm 2) to explore feasible neighbors and expand the feasible set dynamically during optimization.
• Integrates a parallel optimization loop (Algorithm 3) that alternates between fitting the GP, optimizing the batch acquisition, evaluating objectives in parallel, and updating the dataset and feasible set.
• Implements a feasibility-aware search strategy that maintains a growing set of valid sequence pairs to avoid infeasible evaluations.
• Leverages sequence pairs as a discrete representation of macro relative positions, encoding left-right and top-bottom constraints to prevent overlaps.

Experimental results

Research questions

• RQ1 Can Bayesian optimization with batch acquisition outperform traditional black-box methods like simulated annealing in macro placement under real evaluation costs?
• RQ2 How effective is the integration of local search and feasibility expansion in improving convergence speed and solution quality?
• RQ3 To what extent does the GP surrogate model generalize across different macro placement configurations and objective landscapes?
• RQ4 Can batch BO achieve competitive HPWL results with fewer evaluations compared to sequential BO or reinforcement learning?
• RQ5 How does the proposed method scale with increasing numbers of macros and computational resources in parallel evaluation?

Key findings

• The proposed batch BO framework achieves competitive HPWL results compared to state-of-the-art methods, demonstrating strong performance despite high evaluation cost.
• The use of batch acquisition enables parallel evaluation, significantly reducing wall-clock time while maintaining solution quality.
• The integration of local search and feasible set expansion improves exploration efficiency and avoids infeasible configurations during optimization.
• The GP surrogate model effectively captures the structure of the HPWL objective landscape, enabling informed sampling with high sample efficiency.
• The method outperforms simulated annealing in terms of convergence speed and final solution quality on benchmark fixed-outline macro placement problems.
• The framework is robust to varying design complexity and scales well with parallel computational resources, making it viable for real-world chip design.