[Paper Review] Continuous-Time Analog Filters for Audio Edge Intelligence: Review on Circuit Designs

Kwantae Kim, Shih‐Chii Liu|arXiv (Cornell University)|Jun 6, 2022

Advanced Adaptive Filtering Techniques4 citations

TL;DR

This paper presents a unified analysis of continuous-time (CT) analog filter architectures for audio edge intelligence, focusing on voltage-domain second-order filters implemented via a two-integrator-loop biquad topology. It reviews OTA-based, source-follower-based, and flipped voltage follower (FVF) designs, derives their small-signal transfer functions, and validates them through transistor-level simulations, demonstrating their suitability for low-power feature extraction in edge devices like those for keyword spotting and voice activity detection.

ABSTRACT

Edge audio devices can reduce data bandwidth requirements by pre-processing input speech on the device before transmission to the cloud. As edge devices are required to ensure always-on operation, their stringent power constraints pose several design challenges and force IC designers to look for solutions that use low standby power. One promising bio-inspired approach is to combine the continuous-time analog filter channels with a small memory footprint deep neural network that is trained on edge tasks such as keyword spotting, thereby allowing all blocks to be embedded in an IC. This paper reviews the historical background of the continuous-time analog filter circuits that have been used as feature extractors for current edge audio devices. Starting from the interpretation of a basic biquad filter as a two-integrator-loop topology, we introduce the progression in the design of second-order low-pass and band-pass filters ranging from OTA-based to source-follower-based architectures. We also derive and analyze the small-signal transfer function and discuss their usage in edge audio applications.

Motivation & Objective

• To provide a comprehensive review of continuous-time analog filter circuits used in modern audio edge ICs for low-power signal processing.
• To unify the analysis of diverse second-order filter architectures—OTA-based, source-follower-based (XSF, SSF, FVF)—within a common two-integrator-loop biquad framework.
• To derive and validate small-signal transfer functions for these filter types to support their use in feature extraction for edge AI tasks.
• To highlight the power efficiency advantages of CT analog filtering over digital FFT-based approaches in edge audio processing.
• To identify design trade-offs and future research directions in filter bank stability, mismatch, and nonlinearity effects in integrated circuits.

Proposed method

• Adopt a two-integrator-loop biquad topology as the foundational framework for analyzing second-order CT filters.
• Derive small-signal transfer functions for OTA-based, XSF, SSF, and FVF filter implementations using gmC (transconductance-capacitance) equivalent circuits.
• Construct small-signal equivalent diagrams to analyze input/output impedance and signal flow in each filter architecture.
• Validate the derived transfer functions through transistor-level simulations to confirm theoretical predictions.
• Compare CT filter performance with conventional discrete-time (DT) switched-capacitor (SC) filters and FFT-based digital feature extractors in terms of power and area.
• Use the Google Speech Command Dataset (GSCD) as a benchmark input for illustrating filter bank responses in real audio scenarios.

Experimental results

Research questions

• RQ1 How can diverse second-order CT filter architectures (OTA, XSF, SSF, FVF) be systematically analyzed and unified under a single biquad framework?
• RQ2 What are the small-signal transfer functions and equivalent circuit models for each CT filter type, and how do they affect frequency response and dynamic range?
• RQ3 How do CT analog filters compare to FFT-based digital feature extractors in terms of power consumption and silicon area in edge audio ICs?
• RQ4 What are the key design trade-offs in implementing CT filter banks for audio edge intelligence, particularly regarding Q-factor, noise, and stability?
• RQ5 To what extent can deep neural networks tolerate circuit nonidealities such as mismatch and nonlinearity when trained with real filter responses?

Key findings

• The two-integrator-loop biquad topology provides a consistent and analyzable framework for modeling diverse CT filter architectures, including OTA, XSF, SSF, and FVF types.
• The derived small-signal transfer functions for each filter type accurately predict frequency response and Q-factor, validated through transistor-level simulations.
• CT analog filters eliminate the need for high-power FFT computation, reducing feature extractor power consumption to sub-microwatt levels—critical for always-on edge devices.
• Compared to switched-capacitor filters, CT filters avoid kT/C noise aliasing and reduce the need for anti-aliasing filters and front-end buffers, lowering area and power.
• The FVF-based design achieves a high Q-factor with improved linearity and area efficiency, making it suitable for high-performance filter banks in low-power ICs.
• Digital feature extractors based on FFT or DFT consume up to 7.33 µW in state-of-the-art ICs (40% of total power), highlighting the advantage of analog domain processing for power-sensitive applications.