[Paper Review] Decidability of Timed Communicating Automata

Lorenzo Clemente|arXiv (Cornell University)|Apr 20, 2018

Formal Methods in Verification5 references3 citations

TL;DR

This paper establishes a complete decidability characterisation for the reachability problem in networks of timed communicating automata (tCA), where processes communicate via unbounded FIFO channels with timed messages. Using quantifier elimination and a reduction to register automata, it proves that non-emptiness is decidable if and only if the communication topology is a polyforest with at most one inequality test per polytree, generalising prior results to include timed channels and multiple clock types.

ABSTRACT

We study the reachability problem for networks of timed communicating processes. Each process is a timed automaton communicating with other processes by exchanging messages over unbounded FIFO channels. Messages carry clocks which are checked at the time of transmission and reception with suitable timing constraints. Each automaton can only access its set of local clocks and message clocks of sent/received messages. Time is dense and all clocks evolve at the same rate. Our main contribution is a complete characterisation of decidable and undecidable communication topologies generalising and unifying previous work. From a technical point of view, we use quantifier elimination and a reduction to counter automata with registers.

Motivation & Objective

• To characterise which communication topologies in timed communicating automata (tCA) yield decidable reachability problems.
• To generalise prior decidability results on untimed and discrete-time tCA to dense time with timed FIFO channels.
• To unify and extend existing work on timed automata with counters, stacks, and lossy channels by incorporating message clocks and timing constraints.
• To provide a complete, precise characterisation of decidable topologies based on structural properties such as inequality tests and polytree structure.
• To demonstrate that fractional clocks and modulo constraints do not affect decidability, while inequality tests on classical or integral clocks are the key decidable/undecidable boundary.

Proposed method

• The paper reduces the reachability problem in tCA to non-emptiness of a register automaton (rac) via a semantics-preserving translation.
• It introduces a rendezvous semantics to simplify the model, enabling equivalence between tCA configurations and rac configurations.
• A novel encoding maps local and message clocks to register automaton components: fractional parts via registers, integral differences via counters.
• Quantifier elimination is used to handle timing constraints, particularly for diagonal and non-diagonal inequalities on clocks.
• The construction ensures that the rac simulates the tCA’s behaviour while preserving control locations, clock valuations, and message timing constraints.
• The reduction is modular: each polytree is translated into a rac with at most one inequality test, and the full polyforest is simulated by sequentialising each component.

Experimental results

Research questions

• RQ1 Under what structural conditions on the communication topology is the reachability problem decidable for timed communicating automata with timed FIFO channels?
• RQ2 How do different clock types—classical, integral, and fractional—interact with decidability in tCA?
• RQ3 Can the presence of inequality constraints on clocks (diagonal or non-diagonal) be the sole source of undecidability in tCA?
• RQ4 To what extent do timed channels—where message clocks evolve and are checked at transmission and reception—impact decidability compared to untimed channels?
• RQ5 Is it possible to reduce the tCA reachability problem to a non-emptiness problem in a register automaton while preserving decidability?

Key findings

• The non-emptiness problem for tCA is decidable if and only if the communication topology is a polyforest in which each polytree contains at most one channel with inequality tests on classical or integral clocks.
• Fractional clocks and modulo constraints do not affect decidability; they can be safely ignored in the characterisation.
• The undecidability of the tCA reachability problem arises already in discrete time, as shown by the undecidability of the chain topology p→q→r.
• The reduction to register automata preserves semantics and allows a single inequality test to simulate multiple ones across a polytree, enabling efficient simulation.
• The result subsumes and generalises previous decidability results for tCA with untimed channels, discrete time, and richer clock types.
• The characterisation is tight: any topology with more than one inequality test in a single polytree leads to undecidability, even in the presence of only integral clocks.