[Paper Review] Dimming Down LED: An Open-source Threshold Implementation on Light Encryption Device (LED) Block Cipher

Yuan Yao, Yang Mo+2 more|arXiv (Cornell University)|Aug 26, 2021

Cryptographic Implementations and Security4 citations

TL;DR

This paper presents the first open-source threshold implementation of the LED lightweight block cipher, using secret sharing to protect against first-order power analysis attacks. By splitting sensitive data across multiple shares, the design achieves provable security against first-order side-channel attacks, though at the cost of doubling area and reducing maximum frequency by 30%.

ABSTRACT

Lightweight block ciphers have been widely used in applications such as RFID tags, IoTs, and network sensors. Among them, with comparable parameters, the Light Encryption Device (LED) block cipher achieves the smallest area. However, implementation of encryption algorithms manifest side-channel leakage, therefore, it is crucial to protect their design against side-channel analyses. In this paper, we present a threshold implementation of the LED cipher which has 64-bit data input and 128-bit key. The presented design splits secret information among multiple shares to achieve a higher security level. We demonstrate that our implementation can protect against first-order power side-channel attacks. As a cost, the design area is almost doubled and the maximum operating frequency is degraded by 30%. To make our design verifiable, we have also open-sourced our design online.

Motivation & Objective

• To develop a provably secure, first-order side-channel resistant implementation of the LED block cipher.
• To address the vulnerability of lightweight ciphers like LED to differential power analysis (DPA) attacks through hardware countermeasures.
• To provide a verifiable, open-source implementation to support reproducibility and further research in lightweight cryptography.
• To evaluate the area and performance overhead of threshold implementation in a real-world FPGA setting.
• To demonstrate that threshold implementation effectively mitigates side-channel leakage in LED using power trace analysis.

Proposed method

• Adopted threshold implementation (TI) based on secret sharing, splitting each sensitive value into multiple independent shares.
• Applied TI principles to all nonlinear operations (e.g., S-box) and linear operations (e.g., MixColumns, ShiftRows) in the LED cipher.
• Designed a byte-serial, nibble-serial architecture on a Spartan-6 FPGA, reusing the original LED serial implementation as a base.
• Implemented state machine control logic to manage the 128-bit key, 64-bit plaintext, and round state transitions across 12 steps.
• Used a 2→1 reconstruction unit to combine shares back into a single output after encryption, ensuring correctness and completeness.
• Integrated the TI design as a coprocessor on the Skiva 32-bit SPARC V8-based SoC, communicating via APB bus and using memory-mapped registers.

Experimental results

Research questions

• RQ1 Can a threshold implementation be successfully applied to the LED block cipher to achieve first-order side-channel resistance?
• RQ2 What is the area and performance overhead of applying threshold implementation to LED compared to an unprotected version?
• RQ3 Does the proposed TI design effectively reduce side-channel leakage, as measured by power trace analysis?
• RQ4 Can the implementation be made verifiable and open-source to support reproducibility and community validation?
• RQ5 How does the threshold implementation perform in practice when subjected to real power analysis attacks like TVLA?

Key findings

• The proposed threshold implementation successfully protects against first-order power side-channel attacks by ensuring that each share is independent and non-completing.
• The design increases the area by nearly 100% compared to the unprotected LED implementation due to the duplication of logic across shares.
• The maximum operating frequency is reduced by approximately 30% due to the increased complexity and data path width from multiple shares.
• TVLA results show a dramatic reduction in t-values for the threshold implementation compared to the unprotected version, confirming effective leakage reduction.
• The implementation was successfully deployed on a Xilinx Spartan-6 FPGA using the SAKURA-G board, with power traces collected via a WaveRunner 6 Zi HRO oscilloscope.
• The entire design has been open-sourced on GitHub to ensure transparency, verifiability, and community reuse.