[Paper Review] Efficient dot product over word-size finite fields

Jean‐Guillaume Dumas|arXiv (Cornell University)|Apr 5, 2004

Cryptography and Residue Arithmetic18 references3 citations

TL;DR

This paper evaluates and compares multiple implementation techniques for computing the dot product over word-size finite fields, focusing on efficiency through optimized arithmetic representations. It finds that floating-point reduction with error correction outperforms other methods, especially on modern processors, while hybrid approaches using overflow detection and delayed reduction further improve performance for small primes.

ABSTRACT

We want to achieve efficiency for the exact computation of the dot product of two vectors over word-size finite fields. We therefore compare the practical behaviors of a wide range of implementation techniques using different representations. The techniques used include oating point representations, discrete logarithms, tabulations, Montgomery reduction, delayed modulus.

Motivation & Objective

• To identify the most efficient implementation techniques for computing the dot product over word-size finite fields.
• To evaluate the practical performance of various arithmetic representations—classical integer, Montgomery, floating-point, discrete logarithms, and overflow-detection methods—on modern processors.
• To determine optimal strategies for minimizing costly modular reductions in linear algebra kernels.
• To explore hybrid approaches combining block processing and overflow detection for improved performance on small primes.
• To provide a foundation for automated empirical optimization of finite field arithmetic libraries.

Proposed method

• Uses a hybrid approach combining block-wise accumulation with overflow detection to delay modular reduction until the final step.
• Employs a floating-point reduction technique using high-precision inverse of the prime to compute T mod p via T - floor(T * invP) * P, with adjustment for rounding errors.
• Applies an overflow detection trick: if sum < product after addition, an overflow has occurred, so CORR = 2^m mod p is added to correct.
• Uses Montgomery reduction with B = 2^16 or 2^32 to replace costly modulus operations with bit shifts and masks.
• Implements discrete logarithm (Zech) representation using a primitive root to convert multiplications into index arithmetic.
• Introduces a 'centered' representation to reduce overflow risk and improve performance for small primes.

Experimental results

Research questions

• RQ1 Which finite field representation yields the fastest dot product computation on modern 32-bit and 64-bit processors?
• RQ2 How does floating-point reduction compare to integer-based modular arithmetic in terms of performance and accuracy?
• RQ3 Can overflow detection and delayed modular reduction significantly improve performance for small primes?
• RQ4 What is the performance trade-off between block processing and single reduction at the end of the dot product?
• RQ5 How do different arithmetic representations scale with increasing prime size and vector dimension?

Key findings

• Floating-point reduction with error correction consistently outperforms other methods, especially on Pentium IV and similar architectures.
• For small primes (p < 2897), hybrid methods using overflow detection and delayed reduction achieve near-optimal performance with only one final modular reduction.
• The performance drop at p > 2897 is significant due to the need for an additional modular reduction, which is mitigated by hybrid block-overflow techniques.
• Montgomery reduction is slightly faster than integer division but not enough to offset the cost of multiple reductions; thus, floating-point remains superior.
• The hybrid approach combining block processing and overflow detection reduces the number of modular reductions to one, achieving performance close to optimal.
• On a 32-bit system, the floating-point method approximately doubles performance on a 2.4 GHz Pentium IV compared to a 1 GHz Pentium III, highlighting architecture-dependent gains.