[Paper Review] Everything Matters in Programmable Packet Scheduling

Albert Gran Alcoz, Balázs Vass+2 more|arXiv (Cornell University)|Aug 1, 2023

Interconnection Networks and SystemsComputer Science3 citations

TL;DR

PACKS is a novel programmable packet scheduler that fully approximates Push-In First-Out (PIFO) queue behavior on existing hardware by combining rank-aware admission control and intelligent queue mapping across strict-priority queues. It achieves line-rate performance on Intel Tofino2 switches and reduces scheduling errors by up to 75% compared to state-of-the-art approaches like SP-PIFO, while outperforming AIFO in admission control fidelity across diverse workload distributions.

ABSTRACT

Programmable packet scheduling allows the deployment of scheduling algorithms into existing switches without need for hardware redesign. Scheduling algorithms are programmed by tagging packets with ranks, indicating their desired priority. Programmable schedulers then execute these algorithms by serving packets in the order described in their ranks. The ideal programmable scheduler is a Push-In First-Out (PIFO) queue, which achieves perfect packet sorting by pushing packets into arbitrary positions in the queue, while only draining packets from the head. Unfortunately, implementing PIFO queues in hardware is challenging due to the need to arbitrarily sort packets at line rate based on their ranks. In the last years, various techniques have been proposed, approximating PIFO behaviors using the available resources of existing data planes. While promising, approaches to date only approximate one of the characteristic behaviors of PIFO queues (i.e., its scheduling behavior, or its admission control). We propose PACKS, the first programmable scheduler that fully approximates PIFO queues on all their behaviors. PACKS does so by smartly using a set of strict-priority queues. It uses packet-rank information and queue-occupancy levels at enqueue to decide: whether to admit packets to the scheduler, and how to map admitted packets to the different queues. We fully implement PACKS in P4 and evaluate it on real workloads. We show that PACKS: better-approximates PIFO than state-of-the-art approaches and scales. We also show that PACKS runs at line rate on existing hardware (Intel Tofino).

Motivation & Objective

• To address the gap in existing programmable schedulers that only approximate one of two key PIFO behaviors—scheduling order or admission control.
• To design a scheduler that simultaneously approximates both admission and scheduling behaviors of PIFO queues without hardware redesign.
• To enable practical deployment of complex scheduling algorithms on commodity programmable switches using only existing data plane primitives.
• To achieve line-rate operation while minimizing rank inversions and improving fairness and flow completion time.

Proposed method

• PACKS uses a set of strict-priority queues as the underlying hardware abstraction to emulate PIFO behavior.
• It implements a rank-aware admission control mechanism that predicts whether a packet should be admitted based on expected rank distribution and current queue occupancy.
• It applies a dynamic queue-mapping technique that assigns incoming packets to specific priority queues to minimize future rank inversions.
• The scheduler estimates the expected behavior of an ideal PIFO queue at enqueue time and pre-emptsively enacts the admission and scheduling decisions.
• It fully implements the design in P4 and evaluates it on real workloads and a Tofino2 hardware testbed.
• The system leverages packet ranks and queue occupancy levels to make real-time decisions that emulate PIFO’s ability to reorder and drop packets.

Experimental results

Research questions

• RQ1 Can a programmable scheduler approximate both the admission and scheduling behaviors of a PIFO queue simultaneously?
• RQ2 How can PIFO-like behavior be emulated in hardware that cannot reorder or drop already-enqueued packets?
• RQ3 What admission and mapping strategy minimizes scheduling errors and rank inversions in a multi-queue strict-priority framework?
• RQ4 How does the proposed scheduler compare to SP-PIFO and AIFO in terms of scheduling accuracy and admission control fidelity?
• RQ5 Can the scheduler achieve line-rate performance on existing programmable switches like Intel Tofino2?

Key findings

• PACKS reduces scheduling errors by up to 75% compared to SP-PIFO across various load levels and rank distributions.
• At 80% utilization, PACKS performs within 4.12% of the ideal PIFO performance, outperforming SP-PIFO and matching AIFO at the 99th percentile.
• For small flows (<10K packets), PACKS achieves the lowest average flow completion time, only outperformed by AFQ by 10%.
• On the Tofino2 hardware testbed, PACKS successfully prioritizes high-priority flows, allocating bandwidth effectively while FIFO fails to differentiate.
• PACKS maintains line-rate performance on Intel Tofino2 switches, demonstrating practical deployability.
• The scheduler consistently outperforms AIFO in approximating PIFO’s admission behavior across all tested rank distributions.