[Paper Review] Phoenix and Peregrine Ion Traps

Melissa Revelle|arXiv (Cornell University)|Sep 4, 2020

Analytical Chemistry and Sensors2 references17 citations

TL;DR

This paper presents the Phoenix and Peregrine micro-fabricated surface-electrode ion traps, designed for scalable quantum information processing. Fabricated on Sandia’s High Optical Access (HOA) platform using CMOS-compatible processes, they feature segmented control electrodes, integrated heating/temperature sensing, and optimized rf efficiency. The key contribution is a scalable, high-optical-access trap architecture enabling precise ion control and compatibility with quantum computing testbeds.

ABSTRACT

The Phoenix and Peregrine ion traps are micro-fabricated surface-electrode ion traps based on silicon technology. Both are linear traps using a symmetric 6-rail design with segmented inner and outer control electrodes. The traps are fabricated on Sandia's High Optical Access (HOA) platform to provide good optical access skimming the trap surface. They are packaged in custom ceramic pin or land grid array packages using a 2.54 mm pitch. The Peregrine trap is a surface trap with all electrodes in one plane. The Phoenix trap has the same layout, but with a central through-substrate slot and its inner control electrodes are at a lower metal level. Both traps provide means to measure the substrate temperature and to heat the device by means of integrated aluminum and tungsten wires.

Motivation & Objective

• To develop scalable, micro-fabricated ion traps compatible with quantum information processing using CMOS technology.
• To enable high optical access for laser beams skimming the trap surface or passing through a central slot.
• To achieve precise control of ion motion via segmented inner and outer control electrodes with full degrees of freedom.
• To minimize rf dissipation and thermal load for stable operation, especially at cryogenic temperatures.
• To integrate on-chip temperature sensing and resistive heating for in-situ thermal management.

Proposed method

• Design of a symmetric 6-rail linear trap layout with segmented inner and outer control electrodes on a silicon substrate.
• Use of a through-substrate slot in the Phoenix trap to enable vertical optical access with numerical aperture 0.25.
• Fabrication on Sandia’s HOA platform using six metal layers, with inner control electrodes on a lower metal level (M3) to reduce ion perturbation.
• Integration of aluminum and tungsten resistive wires for localized heating and temperature sensing.
• Implementation of trench capacitors on all dc control electrodes to ensure rf grounding and reduce leakage current.
• Development of voltage solution arrays using pseudo-inverse and nonlinear optimization to generate precise electrostatic potentials for shuttling, rotation, and compensation.

Experimental results

Research questions

• RQ1 How can micro-fabricated surface-electrode ion traps be optimized for high optical access and minimal rf dissipation?
• RQ2 What design features enable stable ion shuttling with constant trapping conditions across transition regions?
• RQ3 How can integrated heating and temperature sensing be effectively implemented in a compact, CMOS-compatible trap architecture?
• RQ4 What is the performance of segmented control electrodes in achieving full control of ion motion in a linear trap configuration?
• RQ5 How do the trap designs compare in terms of rf voltage efficiency, axial and radial trap frequencies, and optical access?

Key findings

• The Phoenix trap achieves a numerical aperture of 0.25 for vertical optical access through its central through-substrate slot, enabling high-NA beam delivery perpendicular to the trap surface.
• The Peregrine trap provides a numerical aperture of 0.11 for surface-skimming beams and 0.08 at 45°, supporting high-precision laser control.
• The traps exhibit a maximum axial trap frequency relative to radial frequency of 8%, indicating good balance for gate fidelity.
• The use of trench capacitors on dc electrodes ensures low leakage current (10 nA at ±10 V) and high capacitance (0.8 nF) with series inductance of ~50 pH.
• The Phoenix trap’s ion height is 68 μm in the slotted region and 72 μm in the surface region, while the Peregrine trap maintains a consistent 74 μm height.
• The traps are packaged in custom ceramic land grid array (LGA) or pin grid array (CPGA) packages with 2.54 mm pitch, supporting 100 signal connections and 94 control voltages.