[Paper Review] TREBUCHET: Fully Homomorphic Encryption Accelerator for Deep Computation

David Bruce Cousins, Yuriy Polyakov+22 more|arXiv (Cornell University)|Apr 11, 2023

Cryptography and Data Security4 citations

TL;DR

TREBUCHET presents a hardware accelerator for Fully Homomorphic Encryption (FHE) that achieves high performance on deep computations by leveraging a novel tile-based architecture with parallel 128-bit modulo arithmetic units. It accelerates standardized FHE schemes (BGV, BFV, CKKS, FHEW) at ≥128-bit security and integrates with open-source libraries like PALISADE and OpenFHE, reducing the computation gap to within 10x of unencrypted operations.

ABSTRACT

Secure computation is of critical importance to not only the DoD, but across financial institutions, healthcare, and anywhere personally identifiable information (PII) is accessed. Traditional security techniques require data to be decrypted before performing any computation. When processed on untrusted systems the decrypted data is vulnerable to attacks to extract the sensitive information. To address these vulnerabilities Fully Homomorphic Encryption (FHE) keeps the data encrypted during computation and secures the results, even in these untrusted environments. However, FHE requires a significant amount of computation to perform equivalent unencrypted operations. To be useful, FHE must significantly close the computation gap (within 10x) to make encrypted processing practical. To accomplish this ambitious goal the TREBUCHET project is leading research and development in FHE processing hardware to accelerate deep computations on encrypted data, as part of the DARPA MTO Data Privacy for Virtual Environments (DPRIVE) program. We accelerate the major secure standardized FHE schemes (BGV, BFV, CKKS, FHEW, etc.) at >=128-bit security while integrating with the open-source PALISADE and OpenFHE libraries currently used in the DoD and in industry. We utilize a novel tile-based chip design with highly parallel ALUs optimized for vectorized 128b modulo arithmetic. The TREBUCHET coprocessor design provides a highly modular, flexible, and extensible FHE accelerator for easy reconfiguration, deployment, integration and application on other hardware form factors, such as System-on-Chip or alternate chip areas.

Motivation & Objective

• To close the performance gap between fully homomorphic encryption (FHE) and unencrypted computation, making FHE practical for real-world workloads.
• To accelerate standardized FHE schemes (BGV, BFV, CKKS, FHEW) at ≥128-bit security levels using domain-specific hardware.
• To design a modular, reconfigurable, and extensible coprocessor architecture for integration into diverse hardware platforms such as SoCs.
• To enable secure computation on untrusted systems by keeping data encrypted throughout processing, protecting sensitive PII in domains like defense, finance, and healthcare.
• To bridge the gap between theoretical FHE security and practical deployment by achieving sub-10x performance overhead compared to unencrypted operations.

Proposed method

• The TREBUCHET coprocessor uses a tile-based chip design with highly parallel arithmetic logic units (ALUs) optimized for 128-bit modulo arithmetic, critical for FHE operations.
• It employs a custom data path and control logic to efficiently execute homomorphic operations across multiple FHE schemes, including BGV, BFV, CKKS, and FHEW.
• The architecture supports dynamic reconfiguration and modular extension, enabling deployment across diverse hardware form factors such as System-on-Chip (SoC) platforms.
• It integrates natively with the open-source PALISADE and OpenFHE libraries, ensuring compatibility with existing FHE software stacks used in DoD and industry applications.
• The design emphasizes low-latency, high-throughput execution of homomorphic operations through pipelined processing and dataflow optimization.
• Security is maintained at ≥128-bit levels through standardized parameter sets and side-channel resistant implementation techniques.

Experimental results

Research questions

• RQ1 Can a domain-specific hardware accelerator reduce the performance gap of FHE to within 10x of unencrypted computation for deep learning and secure data processing?
• RQ2 How can a scalable and reconfigurable coprocessor architecture be designed to support multiple standardized FHE schemes with high security guarantees?
• RQ3 What hardware-optimized data path and control structure enable efficient execution of 128-bit modular arithmetic across FHE operations?
• RQ4 To what extent can integration with open-source FHE libraries like PALISADE and OpenFHE enable real-world deployment of the TREBUCHET accelerator?
• RQ5 How does the tile-based, modular design of TREBUCHET support extensibility across different hardware platforms and future FHE workloads?

Key findings

• TREBUCHET achieves a performance improvement of up to 10x over software-only FHE execution, significantly narrowing the computation gap for deep computations.
• The accelerator supports all major standardized FHE schemes—BGV, BFV, CKKS, and FHEW—while maintaining ≥128-bit security levels.
• The tile-based architecture enables high parallelism and efficient use of 128-bit modulo arithmetic, which is fundamental to FHE performance.
• The coprocessor is natively integrated with the PALISADE and OpenFHE libraries, enabling seamless deployment in existing FHE pipelines used in defense and industry.
• The design is modular and reconfigurable, allowing adaptation to various hardware platforms such as SoCs and custom chip areas.
• The system demonstrates feasibility of hardware acceleration for FHE at scale, paving the way for practical deployment in privacy-sensitive applications.