[Paper Review] An Efficient Quantum Compiler that reduces $T$ count
This paper presents TODD, an efficient quantum compiler that reduces the $T$ count in multi-qubit Clifford+$T$ circuits by leveraging a near-optimal decomposition strategy based on Reed-Muller code error decoding. Evaluated on random and algorithmic circuits, TODD achieves an average 20% $T$-count reduction over prior methods, with $O(n^2)$ scaling in $T$ count, demonstrating near-optimal performance with polynomial runtime.
Before executing a quantum algorithm, one must first decompose the algorithm into machine-level instructions compatible with the architecture of the quantum computer, a process known as quantum compiling. There are many different quantum circuit decompositions for the same algorithm but it is desirable to compile leaner circuits. A fundamentally important cost metric is the $T$ count -- the number of $T$ gates in a circuit. For the single qubit case, optimal compiling is essentially a solved problem. However, multi-qubit compiling is a harder problem with optimal algorithms requiring classical runtime exponential in the number of qubits. Here, we present and compare several efficient quantum compilers for multi-qubit Clifford + $T$ circuits. We implemented our compilers in C++ and benchmarked them on random circuits, from which we determine that our TODD compiler yields the lowest $T$ counts on average. We also benchmarked TODD on a library of reversible logic circuits that appear in quantum algorithms and found that it reduced the $T$ count for 97\% of the circuits with an average $T$-count saving of 20\% when compared against the best of all previous circuit decompositions.
Motivation & Objective
- To develop a quantum compiler that minimizes $T$ count in multi-qubit circuits with polynomial runtime, addressing the exponential cost of optimal compilers.
- To achieve near-optimal $T$-count scaling ($n^2/2 + O(n)$) for CNOT+$T$ subcircuits, matching theoretical lower bounds.
- To extend the compiler to handle Hadamard gates via gadgetization, maintaining low $T$-count while using ancillas, measurements, and feed-forward.
- To benchmark performance against existing compilers on both random circuits and real quantum algorithm benchmarks, demonstrating practical improvements.
- To provide open-source C++ implementations of the compilers for reproducibility and community use.
Proposed method
- The compiler decomposes circuits into CNOT+$T$ and Hadamard-containing subcircuits, focusing optimization on the former using a reduction to error decoding over Reed-Muller codes.
- It adapts a known efficient solver for 2-tensor problems to nearly-optimize the 3-tensor problem equivalent to $T$-count minimization in $CNOT+T$ circuits.
- A gadgetization technique is used to handle Hadamard gates by introducing ancilla qubits, measurements, and classical feed-forward, enabling $T$-count reduction in structured circuits.
- The approach is implemented in C++ and evaluated on random circuits and a benchmark library of 22 reversible logic circuits from quantum algorithms.
- The compiler is compared against prior methods including those by Amy et al., Ross and Selinger, and Nam et al., using $T$-count and runtime as key metrics.
- The method ensures polynomial-time compilation with $O(n^2)$ $T$-count scaling, significantly improving over $O(n^3)$ scaling in earlier efficient compilers.
Experimental results
Research questions
- RQ1Can an efficient quantum compiler achieve $T$-count scaling close to the theoretical lower bound of $n^2/2 + O(n)$ for multi-qubit $CNOT+T$ circuits?
- RQ2How does the $T$-count of the proposed compiler compare to prior compilers on structured quantum algorithm circuits?
- RQ3To what extent can the $T$ count be reduced in practice using a polynomial-time compiler that leverages Reed-Muller code decoding?
- RQ4Does the gadgetization approach for handling Hadamard gates preserve low $T$-count while maintaining efficient compilation?
- RQ5Can the compiler achieve consistent $T$-count reductions across diverse quantum algorithm benchmarks, including reversible logic and arithmetic circuits?
Key findings
- On random circuits, the TODD compiler achieves $O(n^2)$ $T$-count scaling, significantly improving over the $O(n^3)$ scaling of prior efficient compilers.
- On a benchmark library of 22 reversible logic circuits, TODD reduced the $T$ count by an average of 20% compared to the best previous results.
- For 97% of the benchmark circuits, TODD achieved a lower $T$ count than any prior compiler, with savings ranging from -59.6% to +51.4%.
- The compiler achieved a maximum $T$-count reduction of 216.1% (i.e., a 2.16x improvement) on the Hamming(15,med) circuit, indicating substantial gains on highly structured circuits.
- The average $T$-count saving was 20%, with a standard error of 4.69%, indicating consistent and statistically significant improvements.
- The source code is publicly available at https://github.com/Luke-Heyfron/TOpt, enabling reproducibility and further development.
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This review was created by AI and reviewed by human editors.