[Paper Review] Design of asynchronous supervisors

Harsh Beohar, Pjl Pieter Cuijpers+1 more|ArXiv.org|Oct 5, 2009

Petri Nets in System Modeling8 references3 citations

TL;DR

This paper proposes four methods to transform synchronous closed-loop systems into asynchronous ones using buffers in plant, supervisor, or communication channels, ensuring branching bisimilarity between synchronous and asynchronous versions. The key contribution is identifying four sufficient conditions—no self-loops, diamond property, controllable/uncontrollable action balance in cycles, and buffer placement—under which a synchronous system is desynchronisable, enabling practical asynchronous implementation without behavioral loss.

ABSTRACT

One of the main drawbacks while implementing the interaction between a plant and a supervisor, synthesised by the supervisory control theory of \citeauthor{RW:1987}, is the inexact synchronisation. \citeauthor{balemiphdt} was the first to consider this problem, and the solutions given in his PhD thesis were in the domain of automata theory. Our goal is to address the issue of inexact synchronisation in a process algebra setting, because we get concepts like modularity and abstraction for free, which are useful to further analyze the synthesised system. In this paper, we propose four methods to check a closed loop system in an asynchronous setting such that it is branching bisimilar to the modified (asynchronous) closed loop system. We modify a given closed loop system by introducing buffers either in the plant models, the supervisor models, or the output channels of both supervisor and plant models, or in the input channels of both supervisor and plant models. A notion of desynchronisable closed loop system is introduced, which is a class of synchronous closed loop systems such that they are branching bisimilar to their corresponding asynchronous versions. Finally we study different case studies in an asynchronous setting and then try to summarise the observations (or conditions) which will be helpful in order to formulate a theory of desynchronisable closed loop systems.

Motivation & Objective

• Address the problem of inexact synchronization in supervisory control theory, where synchronous interaction is impractical in real-world systems.
• Overcome limitations of automata-based approaches by using process algebra to naturally support modularity and abstraction.
• Develop a framework to formally verify that asynchronous implementations of supervisory control systems preserve the behavior of their synchronous counterparts.
• Identify sufficient conditions under which a synchronous closed-loop system is desynchronisable, i.e., branching bisimilar to its asynchronous version.
• Enable practical deployment of synthesized supervisors by enabling asynchronous communication via buffering mechanisms while preserving correctness.

Proposed method

• Use TCP process algebra as the formal specification language to model plant, supervisor, and communication channels.
• Introduce four construction methods (M1–M4) to add buffers to either the plant, supervisor, or input/output channels to enable asynchronous communication.
• Apply branching bisimulation to formally verify equivalence between the original synchronous closed-loop system and its asynchronous counterpart.
• Define and apply the notion of 'desynchronisable' systems as those where the synchronous and asynchronous versions are branching bisimilar.
• Use the $\chi$ toolset to implement and verify the transformation and equivalence checking.
• Apply buffer models (e.g., unbounded queues) to represent communication delays, ensuring behavioral consistency under asynchronous execution.

Experimental results

Research questions

• RQ1 Under what conditions is a synchronous closed-loop system branching bisimilar to its asynchronous counterpart when buffered communication is introduced?
• RQ2 How do different buffer placement strategies (in plant, supervisor, or channels) affect the behavioral equivalence of the closed-loop system?
• RQ3 What structural properties of the transition system ensure that asynchronous execution does not introduce deadlocks or livelocks compared to the synchronous version?
• RQ4 Can the theory of desynchronisable systems be generalized to a broad class of supervisory control systems using process algebra?
• RQ5 Which of the four construction methods yields a larger class of desynchronisable systems under branching bisimulation?

Key findings

• The four construction methods (M1–M4) produce asynchronous systems that are isomorphic in structure, differing only in action abstraction, but not in behavioral equivalence under branching bisimulation.
• A synchronous closed-loop system is desynchronisable if it satisfies four key conditions: no self-loops in plant or supervisor, the diamond property in the transition system, and cycles from the initial state containing at least one controllable and one uncontrollable action.
• Failure to satisfy the cycle condition—specifically, cycles with only controllable actions—can lead to infinite state spaces in the asynchronous system due to unbounded buffering of controllable actions.
• The hypothesis that all four construction methods yield weak trace equivalent systems is false; abstraction of actions significantly affects equivalence, even modulo weak trace equivalence.
• The diamond property is essential for establishing a branching bisimulation between synchronous and asynchronous systems, ensuring that concurrent actions can be reordered consistently.
• Case studies demonstrate that the proposed conditions are both necessary and sufficient for desynchronisability in practical supervisory control systems, such as the pusher-lift system.