[Paper Review] Hierarchical decoding to reduce hardware requirements for quantum computing

Nicolas Delfosse|arXiv (Cornell University)|Jan 30, 2020

Quantum Computing Algorithms and ArchitectureComputer Science1 references18 citations

TL;DR

This paper proposes the lazy decoder, a lightweight hardware pre-decoder that reduces quantum error correction hardware overhead by correcting simple error configurations locally before forwarding complex cases to a sophisticated decoder. For physical error rates of $10^{-5}$, it reduces bandwidth and decoding unit requirements by up to 1,500x and enables 10x–50x speedups in decoding algorithms like Union-Find and Minimum Weight Perfect Matching.

ABSTRACT

Extensive quantum error correction is necessary in order to scale quantum hardware to the regime of practical applications. As a result, a significant amount of decoding hardware is necessary to process the colossal amount of data required to constantly detect and correct errors occurring over the millions of physical qubits driving the computation. The implementation of a recent highly optimized version of Shor's algorithm to factor a 2,048-bits integer would require more 7 TBit/s of bandwidth for the sole purpose of quantum error correction and up to 20,000 decoding units. To reduce the decoding hardware requirements, we propose a fault-tolerant quantum computing architecture based on surface codes with a cheap hard-decision decoder, the lazy decoder, combined with a sophisticated decoding unit that takes care of complex error configurations. Our design drops the decoding hardware requirements by several orders of magnitude assuming that good enough qubits are provided. Given qubits and quantum gates with a physical error rate $p=10^{-4}$, the lazy decoder drops both the bandwidth requirements and the number of decoding units by a factor 50x. Provided very good qubits with error rate $p=10^{-5}$, we obtain a 1,500x reduction in bandwidth and decoding hardware thanks to the lazy decoder. Finally, the lazy decoder can be used as a decoder accelerator. Our simulations show a 10x speed-up of the Union-Find decoder and a 50x speed-up of the Minimum Weight Perfect Matching decoder.

Motivation & Objective

• To reduce the massive hardware overhead of quantum error correction in surface code-based fault-tolerant quantum computing.
• To address the bottleneck of decoding bandwidth and number of decoding units required for large-scale quantum algorithms.
• To design a low-complexity pre-decoder that handles common error configurations locally, minimizing data transmission to complex decoders.
• To enable practical scaling of quantum computers by drastically reducing decoding resource demands.
• To demonstrate that simple local decoding can accelerate and reduce the cost of high-performance decoding algorithms.

Proposed method

• The lazy decoder performs a single pass over syndrome bits to detect and correct simple, localized error configurations using hard-decision logic.
• It is implemented as a low-level hardware unit near the readout device, minimizing latency and feedback loops.
• If no correction is found, the syndrome data is forwarded to a high-performance decoder such as Union-Find or Minimum Weight Perfect Matching.
• The design leverages the sparsity of error configurations in low-error regimes to maximize pre-correction success.
• The method is compatible with surface codes, color codes, and quantum LDPC codes, provided a set of easily correctable configurations can be identified.
• The approach is inspired by flash memory decoding hierarchies, adapting a tiered decoding strategy to quantum error correction.

Experimental results

Research questions

• RQ1 Can a simple, low-complexity pre-decoder reduce the overall hardware cost of quantum error correction in surface codes?
• RQ2 To what extent can local correction of common error patterns reduce the need for high-bandwidth transmission to complex decoders?
• RQ3 How much can the lazy decoder accelerate standard decoding algorithms like Union-Find and Minimum Weight Perfect Matching?
• RQ4 Does the lazy decoder degrade the performance of subsequent high-level decoders, or does it improve overall error correction capability?
• RQ5 Can this hierarchical decoding approach be generalized to other quantum error-correcting codes beyond surface codes?

Key findings

• For a physical error rate of $10^{-5}$, the lazy decoder reduces bandwidth requirements by a factor of 1,500x and decoding unit count by 99.9%.
• The lazy decoder enables a 10x speed-up of the Union-Find decoder and a 50x speed-up of the Minimum Weight Perfect Matching decoder in simulations.
• The lazy decoder does not degrade the performance of subsequent decoders and may slightly improve the correction capacity of the Union-Find decoder.
• The approach reduces the number of decoding units from 20,000 to fewer than 200 for a 2,048-bit factoring algorithm using distance-27 surface codes.
• The lazy decoder is compatible with various quantum codes, including surface codes, color codes, and quantum LDPC codes, due to the sparsity of error configurations at low error rates.
• The method is hardware-friendly and suitable for implementation in FPGA or CMOS, with low latency and high parallelizability.