[Paper Review] On hierarchical statistical static timing analysis

Bing Li, Ning Chen+3 more|arXiv (Cornell University)|Apr 20, 2009

Low-power high-performance VLSI design21 references15 citations

TL;DR

This paper proposes a novel hierarchical statistical static timing analysis method that generates compact, accurate timing models for combinational circuits under process variation. By modeling inter-module correlations through dependent random variables instead of independent ones, the method achieves 3-order-of-magnitude speedup over Monte Carlo simulation while maintaining high accuracy, with models 80% smaller than original circuits.

ABSTRACT

Statistical static timing analysis deals with the increasing variations in manufacturing processes to reduce the pessimism in the worst case timing analysis. Because of the correlation between delays of circuit components, timing model generation and hierarchical timing analysis face more challenges than in static timing analysis. In this paper, a novel method to generate timing models for combinational circuits considering variations is proposed. The resulting timing models have accurate input-output delays and are about 80% smaller than the original circuits. Additionally, an accurate hierarchical timing analysis method at design level using pre-characterized timing models is proposed. This method incorporates the correlation between modules by replacing independent random variables to improve timing accuracy. Experimental results show that the correlation between modules strongly affects the delay distribution of the hierarchical design and the proposed method has good accuracy compared with Monte Carlo simulation, but is faster by three orders of magnitude.

Motivation & Objective

• Address the increased pessimism in worst-case timing analysis due to manufacturing process variations.
• Overcome challenges in hierarchical timing analysis caused by correlations between component delays.
• Develop accurate, compact timing models for combinational circuits under process variation.
• Enable fast and precise hierarchical timing analysis at the design level using pre-characterized models.
• Incorporate inter-module correlations to improve delay distribution accuracy compared to independent variable assumptions.

Proposed method

• Propose a new method to generate timing models for combinational circuits that account for process variations, resulting in models 80% smaller than original circuits.
• Use pre-characterized timing models at the design level to enable hierarchical timing analysis.
• Replace independent random variables with correlated random variables to model dependencies between modules.
• Integrate correlation information into the timing analysis framework to reduce pessimism and improve accuracy.
• Apply statistical techniques to propagate delay variations while preserving correlation effects across hierarchical design levels.
• Validate the method using experimental results comparing accuracy against Monte Carlo simulation.

Experimental results

Research questions

• RQ1 How can timing models be compactly generated while preserving accuracy under process variation?
• RQ2 To what extent do inter-module correlations affect the delay distribution in hierarchical designs?
• RQ3 Can hierarchical timing analysis be made significantly faster than Monte Carlo simulation without sacrificing accuracy?
• RQ4 How does replacing independent random variables with correlated ones improve timing analysis accuracy?
• RQ5 What is the trade-off between model size, computational speed, and accuracy in hierarchical statistical timing analysis?

Key findings

• The proposed timing model generation reduces model size by approximately 80% compared to the original circuit.
• Incorporating inter-module correlations leads to a significant improvement in delay distribution accuracy.
• The hierarchical timing analysis method achieves a speedup of three orders of magnitude compared to Monte Carlo simulation.
• The method maintains high accuracy, closely matching results from Monte Carlo simulation.
• Experimental results confirm that ignoring correlations leads to overly pessimistic delay estimates.
• The use of correlated random variables in timing analysis effectively captures real-world delay dependencies across modules.